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SN74LS19A

現行

具有施密特觸發器輸入的車用 6 通道、4.75-V 至 5.25-V 雙極逆變器

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產品規格表

SN74LS19A

現行
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產品詳細資料

Technology family LS Number of channels 6 IOL (max) (mA) 8 IOH (max) (mA) -0.4 Supply current (max) (µA) 30000 Input type Schmitt-Trigger Output type Push-Pull Features High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) 0 to 70
Technology family LS Number of channels 6 IOL (max) (mA) 8 IOH (max) (mA) -0.4 Supply current (max) (µA) 30000 Input type Schmitt-Trigger Output type Push-Pull Features High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) 0 to 70
SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm)
  • Functionally and Mechanically Identical to 'LS13, 'LS14, and 'LS132, Respectively
  • Improved Line-Receiving Characteristics
  • P-N-P Inputs Reduce System Loading
  • Excellent Noise Immunity with Typical Hysteresis of 0.8 V

 
  • Functionally and Mechanically Identical to 'LS13, 'LS14, and 'LS132, Respectively
  • Improved Line-Receiving Characteristics
  • P-N-P Inputs Reduce System Loading
  • Excellent Noise Immunity with Typical Hysteresis of 0.8 V

 

Each circuit functions as a NAND gate or inverter, but because of the Schmitt action, it has different input threshold levels for positive-going (VT+) and for negative-going (VT-) signals. The hysteresis or backlash, which is the difference between the two threshold levels (VT+ - VT-), is typically 800 millivolts.

These circuits are temperature-compensated and can be triggered from the slowest of input ramps and still give clean, jitter-free output signals.

 

Each circuit functions as a NAND gate or inverter, but because of the Schmitt action, it has different input threshold levels for positive-going (VT+) and for negative-going (VT-) signals. The hysteresis or backlash, which is the difference between the two threshold levels (VT+ - VT-), is typically 800 millivolts.

These circuits are temperature-compensated and can be triggered from the slowest of input ramps and still give clean, jitter-free output signals.

 
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 Schmitt-Trigger Positive-NAND Gates And Inverters With Totem-Pole Outputs datasheet 1988/3/1

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