SN74LV11A

Name: SN74LV11A
Brand: TI
SKU: SN74LV11A
Price: 0.16 USD

現行

3 通道、3 輸入、2V 至 5.5V 高速 (7 ns) AND 閘

立即訂購

產品規格表

document-pdfAcrobat SN54LV11A, SN74LV11A datasheet (Rev. D) (英文)

SN74LV11A

現行

產品規格表

立即訂購

產品詳細資料

Technology family

LV-A

Supply voltage (min) (V)

Supply voltage (max) (V)

5.5

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-12

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Data rate (max) (Mbps)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

LV-A

Supply voltage (min) (V)

Supply voltage (max) (V)

5.5

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-12

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Data rate (max) (Mbps)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

51.9 mm² 8.65 x 6

79.56 mm² 10.2 x 7.8

48.36 mm² 6.2 x 7.8

32 mm² 5 x 6.4

23.04 mm² 3.6 x 6.4

2-V to 5.5-V V_CC Operation
Max t_pd of 7 ns at 5 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2.3 V at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on All Ports
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

2-V to 5.5-V V_CC Operation
Max t_pd of 7 ns at 5 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2.3 V at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on All Ports
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

These triple 3-input positive-AND gates are designed for 2-V to 5.5-V V_CC operation.

The ’LV11A devices perform the Boolean function Y = A • B • C or Y = (A\ + B\ + C\)\ in positive logic.

These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

These triple 3-input positive-AND gates are designed for 2-V to 5.5-V V_CC operation.

The ’LV11A devices perform the Boolean function Y = A • B • C or Y = (A\ + B\ + C\)\ in positive logic.

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