產品詳細資料

Technology family LV-A Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 16 IOH (max) (mA) -16 Supply current (max) (µA) 20 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LV-A Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 16 IOH (max) (mA) -16 Supply current (max) (µA) 20 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOIC (DW) 20 131.84 mm² 12.8 x 10.3 SOP (NS) 20 98.28 mm² 12.6 x 7.8 SSOP (DB) 20 56.16 mm² 7.2 x 7.8 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 TVSOP (DGV) 20 32 mm² 5 x 6.4 VQFN (RGY) 20 15.75 mm² 4.5 x 3.5
  • V CC operation of 2 V to 5.5 V
  • Max t pd of 8.5 ns at 5 V
  • Typical V OLP (Output Ground Bounce) < 0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (Output V OH Undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°C
  • Supports Mixed-Mode Voltage operation on all ports
  • I off supports Partial-Power-Down Mode operation
  • Latch-up performance exceeds 250 mA per JESD 17
  • V CC operation of 2 V to 5.5 V
  • Max t pd of 8.5 ns at 5 V
  • Typical V OLP (Output Ground Bounce) < 0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (Output V OH Undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°C
  • Supports Mixed-Mode Voltage operation on all ports
  • I off supports Partial-Power-Down Mode operation
  • Latch-up performance exceeds 250 mA per JESD 17

The SN74LV540A device is an octal buffer/driver designed for 2 V to 5.5 V V CC operation.

This device is ideal for driving bus lines or buffer memory address registers. It features inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.

The SN74LV540A device is an octal buffer/driver designed for 2 V to 5.5 V V CC operation.

This device is ideal for driving bus lines or buffer memory address registers. It features inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.

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類型 標題 日期
* Data sheet SN74LV540A Octal Buffers/Drivers with 3-State Outputs datasheet (Rev. J) PDF | HTML 2023年 3月 23日

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14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組

14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。

使用指南: PDF | HTML
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開發板

14-24-NL-LOGIC-EVM — 適用於 14 針腳至 24 針腳無引線封裝的邏輯產品通用評估模組

14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM),設計用途可支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。

使用指南: PDF | HTML
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模擬型號

SN74LV540A Behavioral SPICE Model

SCLM178.ZIP (7 KB) - PSpice Model
模擬型號

SN74LV540A IBIS Model

SCEM143.ZIP (18 KB) - IBIS Model
封裝 引腳 下載
SOIC (DW) 20 檢視選項
SOP (NS) 20 檢視選項
SSOP (DB) 20 檢視選項
TSSOP (PW) 20 檢視選項
TVSOP (DGV) 20 檢視選項
VQFN (RGY) 20 檢視選項

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  • 資格摘要
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