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SN74LVC1G06

現行

具有開漏輸出的單一 1.65-V 至 5.5-V 逆變器

立即訂購
產品規格表

SN74LVC1G06

現行
產品規格表 立即訂購

產品詳細資料

Technology family LVC Number of channels 1 IOL (max) (mA) 32 IOH (max) (mA) 0 Supply current (max) (µA) 10 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 1 IOL (max) (mA) 32 IOH (max) (mA) 0 Supply current (max) (µA) 10 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOT-SC70 (DCK) 5 4.2 mm² (2 mm × 2.1 mm) USON (DRY) 6 1.45 mm² (1.45 mm × 1 mm) X2SON (DPW) 5 0.64 mm² (0.8 mm × 0.8 mm) DSBGA (YZP) 5 2.1875 mm² (— mm × — mm) SOT-23 (DBV) 5 8.12 mm² (2.9 mm × 2.8 mm) X2SON (DSF) 6 1 mm² (1 mm × 1 mm) SOT-5X3 (DRL) 5 2.56 mm² (1.6 mm × 1.6 mm) DSBGA (YZV) 4 1.5625 mm² (— mm × — mm)
  • ESD protection exceeds JESD 22
    • 2000V human body model (A114-A)
    • 200V machine model (A115-A)
    • 1000V charged-device model (C101)
  • Available in the Texas Instruments NanoFree™ package
  • Supports 5V VCC operation
  • Input and open-drain output accept voltages up to 5.5V
  • Maximum tpd of 4.5ns at 3.3V at 125°C
  • Low power consumption, 10µA maximum ICC
  • ±24mA output drive at 3.3V for open-drain devices
  • Ioff supports partial-power-down mode and back-drive protection
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • Can be used for up or down translation
  • Schmitt trigger action on all ports
  • ESD protection exceeds JESD 22
    • 2000V human body model (A114-A)
    • 200V machine model (A115-A)
    • 1000V charged-device model (C101)
  • Available in the Texas Instruments NanoFree™ package
  • Supports 5V VCC operation
  • Input and open-drain output accept voltages up to 5.5V
  • Maximum tpd of 4.5ns at 3.3V at 125°C
  • Low power consumption, 10µA maximum ICC
  • ±24mA output drive at 3.3V for open-drain devices
  • Ioff supports partial-power-down mode and back-drive protection
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • Can be used for up or down translation
  • Schmitt trigger action on all ports

This single inverter buffer and driver is designed for 1.65V to 5.5V VCC operation.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

The output of the SN74LVC1G06 device is open-drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32mA.

This device is fully specified for partial-power-down applications using Ioff.The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

This single inverter buffer and driver is designed for 1.65V to 5.5V VCC operation.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

The output of the SN74LVC1G06 device is open-drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32mA.

This device is fully specified for partial-power-down applications using Ioff.The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
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提供更小且易於製造的封裝選項

此裝置目前已推出 0.8 x 0.8 x 0.4 (mm) DPW 封裝，適合空間有限的設計。立即訂購

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SN74AUP2G06 現行 具開汲極輸出的 2 通道、0.8-V 至 3.6-V 低功率逆變器 Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SN74LVC1G06 Single Inverter Buffer or Driver With Open-Drain Output datasheet (Rev. AB) PDF | HTML 2025/10/28
應用說明 Designing and Manufacturing with TI's X2SON Packages 2017/8/23

設計與開發

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開發板

5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組

靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
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5-8-NL-LOGIC-EVM — 支援 5 至 8 針腳 DPW、DQE、DRY、DSF、DTM、DTQ 和 DTT 封裝的通用邏輯和轉譯 EVM

支援任何具 DTT、DRY、DPW、DTM、DQE、DQM、DSF 或 DTQ 封裝的邏輯或轉換裝置之通用 EVM。可實現靈活評估的電路板設計。

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模擬型號

HSpice Model of SN74LVC1G06

SCAJ004.ZIP (38 KB) - HSpice 模型
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模擬型號

SN74LVC1G06 Behavioral SPICE Model

SCEM643.ZIP (7 KB) - PSpice 模型
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模擬型號

SN74LVC1G06 IBIS Model (Rev. E)

SCAM004E.ZIP (24 KB) - IBIS 模型
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許多 TI 參考設計包含 SN74LVC1G06

使用我們的參考設計選擇工具，以檢視並找出最適合您的應用和參數的設計。
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-SC70 (DCK) 5 Ultra Librarian
USON (DRY) 6 Ultra Librarian
X2SON (DPW) 5 Ultra Librarian
DSBGA (YZP) 5 Ultra Librarian
SOT-23 (DBV) 5 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
SOT-5X3 (DRL) 5 Ultra Librarian
DSBGA (YZV) 4 Ultra Librarian
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