SN74LVC1G175-EP

現行

具非同步清除功能的強化型產品單 D 類正反器

立即訂購

產品規格表

document-pdfAcrobat SN74LVC1G175-EP datasheet (Rev. A) (英文)

SN74LVC1G175-EP

現行

產品規格表

立即訂購

產品詳細資料

Number of channels

1

Technology family

LVC

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

150

IOL (max) (mA)

32

IOH (max) (mA)

-32

Supply current (max) (µA)

10

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Operating temperature range (°C)

-55 to 125

Rating

HiRel Enhanced Product

Number of channels

1

Technology family

LVC

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

150

IOL (max) (mA)

32

IOH (max) (mA)

-32

Supply current (max) (µA)

10

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Operating temperature range (°C)

-55 to 125

Rating

HiRel Enhanced Product

SOT-SC70 (DCK)

6

4.2 mm² (2 mm × 2.1 mm)

Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
Max t_pd of 4.3 ns at 3.3 V
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Partial Power-Down-Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
APPLICATIONS
- Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
- Available in Military (–55°C/125°C)
  Temperature Range⁽¹⁾
- Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability

⁽¹⁾ Additional temperature ranges available - contact factory

Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
Max t_pd of 4.3 ns at 3.3 V
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Partial Power-Down-Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
APPLICATIONS
- Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
- Available in Military (–55°C/125°C)
  Temperature Range⁽¹⁾
- Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability

⁽¹⁾ Additional temperature ranges available - contact factory

This single D-type flip-flop is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC1G175 has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock’s (CLK) rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data on D.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This single D-type flip-flop is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC1G175 has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock’s (CLK) rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data on D.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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重要文件	類型	標題	格式選項	日期
*	資料表	SN74LVC1G175-EP datasheet (Rev. A)		2010/12/14
*	輻射及可靠性報告	CLVC1G175MDCKREP Reliability Report		2011/11/30
*	VID	SN74LVC1G175-EP VID V6206633		2016/6/21
	應用說明	Power-Up Behavior of Clocked Devices (Rev. B)	PDF \| HTML	2022/12/15

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SN74LVC1G175-EP

具非同步清除功能的強化型產品單 D 類正反器

SN74LVC1G175-EP

產品詳細資料

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