SN74LVCZ240A

現行

產品詳細資料

Technology family LVC Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 100 Input type Standard CMOS Output type 3-State Features Balanced outputs, Damping resistors, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family LVC Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 100 Input type Standard CMOS Output type 3-State Features Balanced outputs, Damping resistors, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm) SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm) SOP (NS) 20 98.28 mm² (12.6 mm × 7.8 mm)
  • Operates from 2.7V to 3.6V
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 6.5ns at 3.3V
  • Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2V at VCC = 3.3V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Supports Mixed-Mode Signal Operation on All Ports (5V Input/Output Voltage With 3.3V VCC)
  • Latch-up performance exceeds 100mA per JESD 78
  • Operates from 2.7V to 3.6V
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 6.5ns at 3.3V
  • Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2V at VCC = 3.3V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Supports Mixed-Mode Signal Operation on All Ports (5V Input/Output Voltage With 3.3V VCC)
  • Latch-up performance exceeds 100mA per JESD 78

The SN74LVCZ240A is an octal buffer with 3-state outputs. The device is configured into two banks of four drivers, each controlled by an output enable pin.

The SN74LVCZ240A is an octal buffer with 3-state outputs. The device is configured into two banks of four drivers, each controlled by an output enable pin.

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* 資料表 SN74LVCZ240A Octal Buffer with Power-up 3-State Outputs datasheet (Rev. I) PDF | HTML 2026/6/25

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開發板

14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組

14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。

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模擬型號

SN74LVCZ240A IBIS Model

SCEM420.ZIP (29 KB) - IBIS 模型
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TSSOP (PW) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian
SOP (NS) 20 Ultra Librarian

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