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邏輯和電壓轉換
電壓轉換器及電平移位器
電壓轉換器

SN74LXC1T14

現行

單通道固定方向反相 1.1-V 至 5.5-V 電壓位準轉換器

立即訂購
產品規格表

SN74LXC1T14

現行
產品規格表 立即訂購

產品詳細資料

Bits (#) 1 Data rate (max) (Mbps) 420 Topology Push-Pull Direction control (typ) Fixed-direction Vin (min) (V) 1.1 Vin (max) (V) 5.5 Vout (min) (V) 1.1 Vout (max) (V) 5.5 Applications GPIO Features Integrated pulldown resistors, Partial power down (Ioff), Vcc disconnect, Vcc isolation Prop delay (ns) 8 Technology family LXC Supply current (max) (mA) 0.0055 Rating Catalog Operating temperature range (°C) -40 to 125
Bits (#) 1 Data rate (max) (Mbps) 420 Topology Push-Pull Direction control (typ) Fixed-direction Vin (min) (V) 1.1 Vin (max) (V) 5.5 Vout (min) (V) 1.1 Vout (max) (V) 5.5 Applications GPIO Features Integrated pulldown resistors, Partial power down (Ioff), Vcc disconnect, Vcc isolation Prop delay (ns) 8 Technology family LXC Supply current (max) (mA) 0.0055 Rating Catalog Operating temperature range (°C) -40 to 125
SOT-SC70 (DCK) 5 4.2 mm² (2 mm × 2.1 mm)
  • Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
  • Robust, glitch-free power supply sequencing
  • Up to 420-Mbps support for 3.3 V to 5.0 V
  • Schmitt-trigger inputs allow for slow or noisy inputs
  • Input with integrated dynamic pull-down resistors help reduce external component count
  • High drive strength (up to 32 mA at 5 V)
  • Low power consumption
    • 3-µA maximum (25°C)
    • 6-µA maximum (–40°C to 125°C)
  • VCC isolation and Vcc disconnect (Ioff-float) feature
    • If either VCC supply is < 100 mV or disconnected, all I/O’s get pulled-down and then become high-impedance
  • Overvoltage tolerant inputs accept voltages up to 5.5 V regardless of supply voltage.
  • Ioff supports partial-power-down mode operation
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 4000-V human-body model
    • 1000-V charged-device model
  • Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
  • Robust, glitch-free power supply sequencing
  • Up to 420-Mbps support for 3.3 V to 5.0 V
  • Schmitt-trigger inputs allow for slow or noisy inputs
  • Input with integrated dynamic pull-down resistors help reduce external component count
  • High drive strength (up to 32 mA at 5 V)
  • Low power consumption
    • 3-µA maximum (25°C)
    • 6-µA maximum (–40°C to 125°C)
  • VCC isolation and Vcc disconnect (Ioff-float) feature
    • If either VCC supply is < 100 mV or disconnected, all I/O’s get pulled-down and then become high-impedance
  • Overvoltage tolerant inputs accept voltages up to 5.5 V regardless of supply voltage.
  • Ioff supports partial-power-down mode operation
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 4000-V human-body model
    • 1000-V charged-device model

The SN74LXC1T14 is a single bit, dual-supply inverting voltage level translation device with Schmitt-trigger input. The input pin A is referenced to VCCI logic levels, and output pin Y is referenced to VCCO logic levels. The input pin A is able to accept voltages ranging from 1.1 V to 5.5 V and can be connected directly to VCCI or GND. See Device Functional Modes for a summary of the operation of the logic.

This device ensures low power consumption and is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

The SN74LXC1T14 is a single bit, dual-supply inverting voltage level translation device with Schmitt-trigger input. The input pin A is referenced to VCCI logic levels, and output pin Y is referenced to VCCO logic levels. The input pin A is able to accept voltages ranging from 1.1 V to 5.5 V and can be connected directly to VCCI or GND. See Device Functional Modes for a summary of the operation of the logic.

This device ensures low power consumption and is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SN74LXC1T14 Dual-Supply Inverting Translator with Schmitt-Trigger Input datasheet PDF | HTML 2022/5/10
應用說明 Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024/10/2
應用說明 Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024/7/12
應用說明 Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024/7/3

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開發板

5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組

靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
使用指南: PDF
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模擬型號

SN74LXC1T14 IBIS Model

SCEM794.ZIP (56 KB) - IBIS 模型
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參考設計

TIDA-010978 — 高達 1500V 可堆疊式電池管理單元參考設計，整合 EIS

本參考設計為一款具備全電池溫度感測與高電芯電壓精準度，適用於鋰離子 (Li-ion) 及磷酸鋰鐵 (LiFePO4) 電池組（52s 與 104s）的解決方案。該設計可監測每個電芯的電壓、溫度與阻抗，同時支援整合式電化學阻抗頻譜 (EIS) 及穩固的菊鍊通訊。此設計支援高達 1500V 的可堆疊式儲能系統。這些功能讓此參考設計適用於高容量電池組應用。
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-SC70 (DCK) 5 Ultra Librarian
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