產品詳細資料

Configuration 1:1 SPST Number of channels 11 Power supply voltage - single (V) 0.8, 1.2, 1.8, 2.5, 3.3, 5 Protocols Analog CON (typ) (pF) 12 Bandwidth (MHz) 100 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (A) 0.064 Rating Catalog Drain supply voltage (max) (V) 5
Configuration 1:1 SPST Number of channels 11 Power supply voltage - single (V) 0.8, 1.2, 1.8, 2.5, 3.3, 5 Protocols Analog CON (typ) (pF) 12 Bandwidth (MHz) 100 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (A) 0.064 Rating Catalog Drain supply voltage (max) (V) 5
SOIC (DW) 24 159.65 mm² (15.5 mm × 10.3 mm) TSSOP (PW) 24 49.92 mm² (7.8 mm × 6.4 mm) SSOP (DBQ) 24 51.9 mm² (8.65 mm × 6 mm) TVSOP (DGV) 24 32 mm² (5 mm × 6.4 mm)
  • Designed to be Used in Voltage-Limiting Applications
  • 6.5- On-State Connection Between Ports A and B
  • Flow-Through Pinout for Ease of Printed Circuit Board Trace Routing
  • Direct Interface With GTL+ Levels
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

  • Designed to be Used in Voltage-Limiting Applications
  • 6.5- On-State Connection Between Ports A and B
  • Flow-Through Pinout for Ease of Printed Circuit Board Trace Routing
  • Direct Interface With GTL+ Levels
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

The SN74TVC3010 provides 11 parallel NMOS pass transistors with a common gate. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device can be used as a 10-bit switch with the gates cascaded together to a reference transistor. The low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to protect components with inputs that are sensitive to high-state voltage-level overshoots. (See Application Information in this data sheet.)

All of the transistors in the TVC array have the same electrical characteristics; therefore, any one of them can be used as the reference transistor. Since, within the device, the characteristics from transistor to transistor are equal, the maximum output high-state voltage (VOH) is approximately the reference voltage (VREF), with minimal deviation from one output to another. This is a large benefit of the TVC solution over discrete devices. Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the low-voltage side, and the I/O signals are bidirectional through each FET.

The SN74TVC3010 provides 11 parallel NMOS pass transistors with a common gate. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device can be used as a 10-bit switch with the gates cascaded together to a reference transistor. The low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to protect components with inputs that are sensitive to high-state voltage-level overshoots. (See Application Information in this data sheet.)

All of the transistors in the TVC array have the same electrical characteristics; therefore, any one of them can be used as the reference transistor. Since, within the device, the characteristics from transistor to transistor are equal, the maximum output high-state voltage (VOH) is approximately the reference voltage (VREF), with minimal deviation from one output to another. This is a large benefit of the TVC solution over discrete devices. Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the low-voltage side, and the I/O signals are bidirectional through each FET.

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* 資料表 SN74TVC3010 datasheet (Rev. G) 2003/8/27

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