TPLD801

現行

具有六個通用型輸入或輸出 (GPIO) 的可編程邏輯裝置

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產品規格表

document-pdfAcrobat TPLD801 Programmable Logic Device with 6-GPIO datasheet (Rev. C) (英文) PDF | HTML

TPLD801

現行

產品規格表

立即訂購

產品詳細資料

Number of GPIOs

6

LUTs

10

Analog comparators

0

Interface type

General purpose

Digital flip-flops

4

Shift registers

1

Counters

8-bit / 4

Number of oscillators

1

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Number of GPIOs

6

LUTs

10

Analog comparators

0

Interface type

General purpose

Digital flip-flops

4

Shift registers

1

Counters

8-bit / 4

Number of oscillators

1

Rating

Catalog

Operating temperature range (°C)

-40 to 125

SOT-5X3 (DRL)

8

3.36 mm² (2.1 mm × 1.6 mm)

Operating characteristics
- Extended temperature range: -40°C to 125°C
- Wide supply voltage range: 1.65V to 5.5V

Configurable macro-cells
- 2-, 3-, and 4-bit lookup tables
- D-type flip-flops and latches with and without reset/set option
- 8-bit pipe delay
- Counters and delay generator
- Programmable deglitch filter or edge detector
- Oscillator

Flexible digital I/O features
- All digital signals can be routed to any GPIO
- Digital input modes: digital in with and without Schmitt-trigger, low-voltage digital in
- Digital output modes: push-pull, open-drain NMOS, tri-state

Development tools
- InterConnect Studio
- TPLD801 evaluation module
- TPLD programming board

Operating characteristics
- Extended temperature range: -40°C to 125°C
- Wide supply voltage range: 1.65V to 5.5V

Configurable macro-cells
- 2-, 3-, and 4-bit lookup tables
- D-type flip-flops and latches with and without reset/set option
- 8-bit pipe delay
- Counters and delay generator
- Programmable deglitch filter or edge detector
- Oscillator

Flexible digital I/O features
- All digital signals can be routed to any GPIO
- Digital input modes: digital in with and without Schmitt-trigger, low-voltage digital in
- Digital output modes: push-pull, open-drain NMOS, tri-state

Development tools
- InterConnect Studio
- TPLD801 evaluation module
- TPLD programming board

The TPLD801 is part of the TI programmable logic device (TPLD) family of devices that feature versatile programmable logic ICs with combinational logic, sequential logic, and analog blocks. TPLD provides a fully integrated, low power solution to implement common system functions, such as timing delays, voltage monitors, system resets, power sequencers, I/O expanders, and more. This device features configurable I/O structures that extends compatibility within mixed-signal environments, reducing the number of discrete components required.

System designers can create circuits and configure the macro-cells, I/O pins, and interconnections by temporarily emulating the non-volatile memory or by permanently programming the one-time programmable (OTP) through InterConnect Studio. The TPLD801 is supported by hardware and software ecosystem with application notes, reference designs and design examples. Visit ti.com for more information and access to design tools.

The TPLD801 is part of the TI programmable logic device (TPLD) family of devices that feature versatile programmable logic ICs with combinational logic, sequential logic, and analog blocks. TPLD provides a fully integrated, low power solution to implement common system functions, such as timing delays, voltage monitors, system resets, power sequencers, I/O expanders, and more. This device features configurable I/O structures that extends compatibility within mixed-signal environments, reducing the number of discrete components required.

System designers can create circuits and configure the macro-cells, I/O pins, and interconnections by temporarily emulating the non-volatile memory or by permanently programming the one-time programmable (OTP) through InterConnect Studio. The TPLD801 is supported by hardware and software ecosystem with application notes, reference designs and design examples. Visit ti.com for more information and access to design tools.

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重要文件	類型	標題	格式選項	下載最新的英文版本		日期
*	資料表	TPLD801 Programmable Logic Device with 6-GPIO datasheet (Rev. C)	PDF \| HTML			2026/4/9
	Application brief	Safety-Toggle Off Circuit for Robotics Applications using TPLD	PDF \| HTML			2026/7/22
	Application brief	Power Line Communication (PLC) with TI's Programmable Logic Devices (TPLD)	PDF \| HTML			2025/12/18
	應用說明	Up and Down Translation in TI’s Programmable Logic Devices (TPLD)	PDF \| HTML			2025/11/6
	Application brief	Multiplexers in TI Programmable Logic Devices	PDF \| HTML			2025/6/2
	Application brief	Analog Voltage Detection in TI Programmable Logic Devices	PDF \| HTML			2025/6/2
	Application brief	Edge and Frequency Detection in TI Programmable Logic Devices	PDF \| HTML			2025/5/30
	技術文章	釋放可編程邏輯的可能性 (Rev. A)	PDF \| HTML	Download English Version (Rev.A)	PDF \| HTML	2025/4/15
	Application brief	Configure a One Shot With TI Programmable Logic Devices	PDF \| HTML			2024/10/28
	Application brief	Blink an LED With TI Programmable Logic Devices	PDF \| HTML			2024/10/28
	Application brief	Configurable Delay Blocks in TI's Programmable Logic Devices	PDF \| HTML			2024/10/9
	應用說明	Using Lookup-Tables in Programmable Logic	PDF \| HTML			2024/8/22
	Application brief	Smart Occupancy Lighting Using TI Programmable Logic Devices	PDF \| HTML			2024/8/8
	證書	TPLD801-DRL-EVM EU Declaration of Conformity (DoC)				2024/6/10
	Application brief	Power Sequencing With Feedback Using TI Programmable Logic Devices	PDF \| HTML			2023/10/17

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TPLD801-DRL-EVM — 具有 DRL 封裝插槽的 TPLD801 評估模組

此評估模組 (EVM) 可協助使用者評估 TPLD801DRL 裝置，且無須將裝置焊接至電路板。使用者可運用 InterConnect Studio 軟體進行快速評估、開發、模擬和程式設計工作。完成程式設計後，即可從插座中移除 TI 可編程邏輯裝置 (TPLD)，並將其放置於使用者的系統。為了對裝置進行編程，必須具備 TPLD-PROGRAM 板和 InterConnect Studio。

使用指南: PDF | HTML

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