產品詳細資料

Technology family TXU Applications GPIO, JTAG, SPI, UART Bits (#) 2 Configuration 2 Ch A to B 0 Ch B to A High input voltage (min) (V) 0.44 High input voltage (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 5.5 Data rate (max) (Mbps) 200 IOH (max) (mA) -12 IOL (max) (mA) -12 Supply current (max) (µA) 5.5 Features 1.08, 1.95, 4.6 Input type Schmitt-Trigger Output type 3-State Rating Catalog Operating temperature range (°C) -40 to 125
Technology family TXU Applications GPIO, JTAG, SPI, UART Bits (#) 2 Configuration 2 Ch A to B 0 Ch B to A High input voltage (min) (V) 0.44 High input voltage (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 5.5 Data rate (max) (Mbps) 200 IOH (max) (mA) -12 IOL (max) (mA) -12 Supply current (max) (µA) 5.5 Features 1.08, 1.95, 4.6 Input type Schmitt-Trigger Output type 3-State Rating Catalog Operating temperature range (°C) -40 to 125
VSSOP (DCU) 8 6.2 mm² 2 x 3.1 X1QFN (DTT) 8 1.95 mm² 1.95 x 1 X2SON (DTM) 8 1.08 mm² 0.8 x 1.35
  • Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
  • Up to 200 Mbps support for 3.3 V to 5.0 V
  • Schmitt-trigger inputs allows for slow and noisy inputs
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • High drive strength (up to 12 mA at 5 V)
  • Low power consumption
    • 2.5 µA maximum (25°C)
    • 6 µA maximum (–40°C to 125°C)
  • VCC isolation and VCC disconnect (Ioff-float) feature
    • If either VCC input is <100 mV or disconnected, all outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
  • Pinout compatible with TXB family level shifters
  • Available in another variant that supports common applications: TXU0202
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2500-V human-body model
    • 1500-V charged-device model
  • Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
  • Up to 200 Mbps support for 3.3 V to 5.0 V
  • Schmitt-trigger inputs allows for slow and noisy inputs
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • High drive strength (up to 12 mA at 5 V)
  • Low power consumption
    • 2.5 µA maximum (25°C)
    • 6 µA maximum (–40°C to 125°C)
  • VCC isolation and VCC disconnect (Ioff-float) feature
    • If either VCC input is <100 mV or disconnected, all outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
  • Pinout compatible with TXB family level shifters
  • Available in another variant that supports common applications: TXU0202
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2500-V human-body model
    • 1500-V charged-device model

TXU0102 is a 2-bit, dual-supply noninverting fixed direction voltage level translation device. Ax pins are referenced to VCCA logic level, OE pin can be referenced to either VCCA or VCCB logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept input voltages ranging from 1.1 V to 5.5 V, while the B port can also accept input voltages from 1.1 V to 5.5 V. Fixed direction data transmission can occur from A to B or B to A when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

TXU0102 is a 2-bit, dual-supply noninverting fixed direction voltage level translation device. Ax pins are referenced to VCCA logic level, OE pin can be referenced to either VCCA or VCCB logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept input voltages ranging from 1.1 V to 5.5 V, while the B port can also accept input voltages from 1.1 V to 5.5 V. Fixed direction data transmission can occur from A to B or B to A when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

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類型 標題 日期
* Data sheet TXU0102 Dual-Bit Fixed Direction Voltage-Level Translator with Schmitt-Trigger Inputs and 3-State Outputs datasheet (Rev. A) PDF | HTML 2022年 3月 10日
Application brief Enabling Power-Efficient FPGA Designs With Level Translation PDF | HTML 2024年 4月 30日
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 2023年 9月 5日
Product overview Enabling System on Module Industrial PC Connectivity With Level Translation PDF | HTML 2023年 4月 3日
Application brief Enabling Next Generation Processors, FPGA, and ASSP with Voltage Level Translat PDF | HTML 2023年 1月 17日
Application brief Enabling Next Generation Wireless Beacons with Level Translation PDF | HTML 2022年 4月 14日

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開發板

5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組

靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
使用指南: PDF
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模擬型號

TXU0102, TXU0102-Q1 IBIS Model

SCEM792.ZIP (56 KB) - IBIS Model
封裝 引腳 下載
VSSOP (DCU) 8 檢視選項
X1QFN (DTT) 8 檢視選項
X2SON (DTM) 8 檢視選項

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