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數據轉換器
整合式與特殊功能資料轉換器
CCD & CIS 成像 AFE

VSP5000

不推薦在新設計中採用

適用於 CCD/CMOS/CIS 感測器的 12 位元 30MSPS 2 通道 AFE

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產品規格表
VSP5000 不建議用於新設計
儘管為了支援以前的設計而繼續生產此項產品，但我們並不建議用在新設計上。考量下列其中一項替代產品：
open-in-new 比較替代產品
功能相似於所比較的產品
VSP5610 現行 16 位元 35MSPS 4 通道成像類比前端 This product is a 3-s - 5-s monitor with integrated ADC.

VSP5000

不推薦在新設計中採用
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 12 Sample rate (Msps) 30 Gain (min) (dB) 0 Gain (max) (dB) 24 Pd (typ) (mW) 290 Supply voltage (max) (V) 3.6 Operating temperature range (°C) -25 to 85 Output data format CMOS Parallel Rating Catalog
Resolution (Bits) 12 Sample rate (Msps) 30 Gain (min) (dB) 0 Gain (max) (dB) 24 Pd (typ) (mW) 290 Supply voltage (max) (V) 3.6 Operating temperature range (°C) -25 to 85 Output data format CMOS Parallel Rating Catalog
LQFP (PM) 64 144 mm² 12 x 12
  • Dual Channel CCD Signal Processing:
    • Correlated Double Sampler (CDS)
    • Sample Hold Mode
    • Digital Programmable Amplifier
    • CCD Offset Correction (OB loop)
  • High Performance A/D:
    • 12-Bit Resolution
    • INL: ±2 LSB
    • DNL: ±0.5 LSB
    • No Missing Codes
  • High-Speed Operation
    • Sample Rate: 30 MHz (Minimum)
  • 78-dB Signal-To-Noise Ratio (at 0-dB Gain)
  • Low Power Consumption:
    • Low Voltage: 3 V to 3.6 V
    • Low Power: 290 mW (Typ) at 3.3 V
    • Standby Mode: 20 mW (Typ)
  • APPLICATIONS
    • Copiers
    • Scanners
    • Facsimiles
  • Dual Channel CCD Signal Processing:
    • Correlated Double Sampler (CDS)
    • Sample Hold Mode
    • Digital Programmable Amplifier
    • CCD Offset Correction (OB loop)
  • High Performance A/D:
    • 12-Bit Resolution
    • INL: ±2 LSB
    • DNL: ±0.5 LSB
    • No Missing Codes
  • High-Speed Operation
    • Sample Rate: 30 MHz (Minimum)
  • 78-dB Signal-To-Noise Ratio (at 0-dB Gain)
  • Low Power Consumption:
    • Low Voltage: 3 V to 3.6 V
    • Low Power: 290 mW (Typ) at 3.3 V
    • Standby Mode: 20 mW (Typ)
  • APPLICATIONS
    • Copiers
    • Scanners
    • Facsimiles

The VSP5000 device is a complete application specific standard product (ASSP) for charge-coupled device (CCD) line sensor applications such as copiers, scanners, and facsimiles. The VSP5000 device provides two independent channels of processing lines and performs analog front-end processing and analog-to-digital (A/D) conversion. Each channel has a correlated double sampler (CDS)/sample hold (SH) circuit, a 14-bit analog-to-digital converter (ADC), a digital programmable gain amplifier (DPGA), and an optical black (OB) correction loop. Data output is 12 bits in length and the 2-channel A/D data is multiplexed and output.

The VSP5000 is available in a 64-lead LQFP package and operates from a single 3.3-V supply.

The VSP5000 device is a complete application specific standard product (ASSP) for charge-coupled device (CCD) line sensor applications such as copiers, scanners, and facsimiles. The VSP5000 device provides two independent channels of processing lines and performs analog front-end processing and analog-to-digital (A/D) conversion. Each channel has a correlated double sampler (CDS)/sample hold (SH) circuit, a 14-bit analog-to-digital converter (ADC), a digital programmable gain amplifier (DPGA), and an optical black (OB) correction loop. Data output is 12 bits in length and the 2-channel A/D data is multiplexed and output.

The VSP5000 is available in a 64-lead LQFP package and operates from a single 3.3-V supply.
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類型 標題 日期
* Data sheet 12-Bit 30 MSPS Dual Channel CCD Signal Front End for Digital Copier datasheet (Rev. A) 2014年 4月 17日

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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