The AFE7769D evaluation module (EVM) is a development platform for the AFE7769D integrated radio-frequency (RF) transceiver. AFE7769D is a high-performance, multichannel, four-transmit, four-receive, two-feedback (4T4R2FB) transceiver. It has an integrated low-power digital predistortion (DPD) engine and crest factor reduction (CFR) for power amplifier (PA) linearization and peak-to-average (PAR) reduction.
The high dynamic range of the transmitter and receiver chains enables wireless base stations to generate and receive 2G, 3G, 4G and 5G signals, with RF ranges from 600 MHz to 6 GHz. The integrated PA nonlinearity estimator and corrector provide flexible and efficient DPD solutions for PA linearization at different PA-output power levels and frequency bands. The integrated DPD engine corrects the distortion due to PA nonlinearity for signal up to 300-MHz instantaneous bandwidth within up to 750-MHz expanded bandwidth.
AFE7769D integrates eight JESD204B/C-compatible serializer/deserializer (SerDes) transceivers capable of running up to 29.5 Gbps to transmit and receive digital data through the onboard FPGA mezzanine card (FMC) connector. The design interfaces with our pattern/capture card solutions (TSW14J58EVM, sold separately), as well as many field-programmable gate array (FPGA) development kits.
AFE7769DEVM includes the LMK04828 clock generator for providing reference clocks and system reference (SYSREF) to the analog front end (AFE) and capture card (FPGA). The EVM works off a single 6-V input and includes complete power management. External clocking options include support for feeding the reference clock [for on-chip phase-locked loop (PLL)] or the channel frequency (at 2x LO).
The included software is a Python-based software tool that can be used to configure AFE7769D in a user-defined mode. These configurations can be saved in .xls or .json format and referred as configuration files. Subsequently, the configuration file can be used by the host (FPGA or ASIC) in the application board to bring up the AFE7769D. The software can also be used to configure the AFE7769DEVM when such an EVM is connected to the PC. Latte can run in simulation mode when no EVM is connected.
| Type | Title | Date | ||
|---|---|---|---|---|
| Certificate | AFE7769D-MBEVM EU Declaration of Conformity (DoC) | 14 Oct 2024 | ||
| Certificate | AFE7769D-18EVM EU Declaration of Conformity (DoC) | 31 Jan 2024 | ||
| Certificate | AFE7769D-LBEVM EU Declaration of Conformity (DoC) | 31 Jan 2024 | ||
| Certificate | AFE7769D-21EVM EU Declaration of Conformity (DoC) | 31 Jan 2024 | ||
| Certificate | AFE7769D-26EVM EU Declaration of Conformity (DoC) | 31 Jan 2024 | ||
| Certificate | AFE7769D-49EVM EU Declaration of Conformity (DoC) | 31 Jan 2024 | ||
| Certificate | AFE7769DEVM EU RoHS Declaration of Conformity (DoC) | 03 Nov 2022 |
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