CDCLVC1112 Evaluation Module


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The CDCLVC1112 is a high-performance, low additive phase noise LVCMOS clock buffer. It has one LVCMOS input and twelve LVCMOS outputs. It has also an enable pin. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVC1112. However, this EVM can also be used for customers interested in evaluating the performance of the CDCLVC1106, CDCLVC1108 or CDCLVC1110 as well. For optimum performance, the board is equipped with 50-ohm SMA connectors and well controlled 50-ohm impedance microstrip transmission lines.

  • Easy-to-use evaluation board to fan out low phase noise LVCMOS clock signals
  • Easy device setup
  • Enable pin configurable though jumper and SMA
  • Board powered at 3.3V
Clock buffers
CDCLVC1106 Low jitter, 1:6 LVCMOS fan-out clock buffer CDCLVC1108 Low jitter, 1:8 LVCMOS fan-out clock buffer CDCLVC1110 Low jitter, 1:10 LVCMOS fan-out clock buffer CDCLVC1112 Low jitter, 1:12 LVCMOS fan-out clock buffer

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Evaluation board

CDCLVC1112EVM – CDCLVC1112 Evaluation Module

TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
Certificate CDCLVC1112EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
User guide Low Additive Phase Noise LVCMOS Clock Buffer Eval Board Jul. 07, 2010

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