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Product details

Parameters

Function Single-ended Additive RMS jitter (Typ) (fs) 70 Output frequency (Max) (MHz) 250 Number of outputs 8 VCC out (V) 2.5, 3.3 Core supply voltage (V) 2.5, 3.3 Output skew (ps) 50 Features 1:8 fanout, Output enable control Operating temperature range (C) -40 to 85 Rating Catalog Output type LVCMOS Input type LVCMOS open-in-new Find other Clock buffers

Package | Pins | Size

TSSOP (PW) 16 22 mm² 5 x 4.4 open-in-new Find other Clock buffers

Features

  • High-Performance 1:2, 1:3, 1:4, 1:6, 1:8, 1:10, 1:12 LVCMOS Clock Buffer Family
  • Very Low Pin-to-Pin Skew < 50 ps
  • Very Low Additive Jitter < 100 fs
  • Supply Voltage: 3.3 V or 2.5 V
  • fmax = 250 MHz for 3.3 V
    fmax = 180 MHz for 2.5 V
  • Operating Temperature Range: –40°C to 85°C
  • Available in 8-, 14-, 16-, 20-, 24-Pin TSSOP Package (All Pin-Compatible)

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Description

The CDCLVC11xx is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments.

The entire family is designed with a modular approach in mind. It is intended to round up TI’s series of LVCMOS clock generators.

Seven different fan-out variations, 1:2 to 1:12, are available. All of the devices are pin-compatible to each other for easy handling.

All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.

The CDCLVC11xx supports an asynchronous output enable control (1G) which switches the outputs into a low state when 1G is low.

The CDCLVC11xx family operates in a 2.5-V and
3.3-V environment and are characterized for operation from –40°C to 85°C.

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Technical documentation

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Type Title Date
* Datasheet CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family datasheet (Rev. B) Feb. 24, 2017
Application notes How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer Nov. 30, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$149.00
Description
The CDCLVC1112 is a high-performance, low additive phase noise LVCMOS clock buffer. It has one LVCMOS input and twelve LVCMOS outputs. It has also an enable pin. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVC1112. However, this EVM can also be used (...)
Features
  • Easy-to-use evaluation board to fan out low phase noise LVCMOS clock signals
  • Easy device setup
  • Enable pin configurable though jumper and SMA
  • Board powered at 3.3V

Design tools & simulation

SIMULATION MODELS Download
SLLM088B.ZIP (263 KB) - IBIS Model

Reference designs

REFERENCE DESIGNS Download
Isolated Current Shunt and Voltage Measurement Reference Design for Motor Drives Using AM437x
TIDA-00209 This reference design uses the AMC130x reinforced isolated delta-sigma modulators along with AM437x Sitara™ ARM® Cortex® -A9 Processor, which implements Sinc filters on PRU-ICSS. The design provides an ability to evaluate the performance of these measurements: three motor currents, three (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
TSSOP (PW) 16 View options

Ordering & quality

Support & training

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