DAC12DL3200 evaluation module for 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling DAC


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The DAC12DL3200 evaluation module (EVM) is a platform for evaluating the DAC12DL3200, which is a very-low-latency, dual-channel, 12-bit, RF-sampling digital-to-analog converter (DAC), capable of operating at sampling rates up to 3.2 GSPS in dual-channel mode or 6.4 GSPS in single-channel mode.

DAC12DL3200 can transmit signal bandwidths beyond 2 GHz at carrier frequencies approaching 8 GHz when using multiple Nyquist output modes. DAC12DL3200EVM device input data is transmitted over a high-speed low-voltage differential signaling (LVDS) interface.

An LMX2592 clock synthesizer and LMK04828 JESD204B clock generator are included on the EVM and can be configured to provide an ultra-low-jitter DAC device clock and SYSREF for a complete clocking solution.

DAC12DL3200, LMX2592, and LMK04828 are controlled through an easy-to-use software GUI to enable quick configuration for a variety of uses.

DAC12DL3200EVM connects directly to the TSW14DL3200EVM pattern-generator hardware via the high-speed FPGA mezzanine card (FMC) connector. High-speed data converter pro software (DATACONVERTERPRO-SW) is available for pattern generation when using the TSW14DL3200EVM.

  • Flexible transformer-coupled analog output allows for single-ended 50-Ω output
  • Easy-to-use software GUI to configures DAC12DL3200, LMX2592, and LMK04828 for a variety of configurations through a USB interface
  • Quickly provide evluation test patterns through DATACONVERTERPRO-SW
  • Simple connection to TSW14DL3200EVM pattern generator card (sold separately)

  • DAC12DL3200 evaluation module
  • Power cable
  • USB cable

High-speed DACs (>10 MSPS)
DAC12DL3200 12-bit, low-latency, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling DAC (LVDS interface)


Clock jitter cleaners & synchronizers
LMK04828 Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.


RF PLLs & synthesizers
LMX2592 9.8-GHz wideband frequency synthesizer with integrated VCO
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Evaluation board


DAC12DL3200 evaluation module for 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling DAC

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Evaluation board

TSW14DL3200EVM — Data capture/pattern generator: data converter evaluation module with 48 LVDS lanes up to 1.6Gbps

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Design tool

DAC12DL3200EVM Design Files (Rev. A) — SBAR018A.ZIP (14847KB)

Support software

DAC12DL3200EVM GUI — SBAC283.ZIP (324391KB)

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Technical documentation

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Type Title Date
* User guide DAC12DL3200 Evaluation Module User's Guide (Rev. A) PDF | HTML 23 May 2022
Data sheet DAC12DL3200 up to 6.4-GSPS Single-Channel or 3.2-GSPS Dual-Channel 12-bit Digital-to-Analog Converter (DAC) with Low-Latency LVDS Interface datasheet (Rev. B) PDF | HTML 27 Jun 2022
Certificate DAC12DL3200EVM EU RoHS Declaration of Conformity (DoC) 11 May 2021
Certificate DAC12DL3200EVM EU Declaration of Conformity (DoC) 02 Jan 2019

Support & training

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