Transmitting SPI Signals Over LVDS Interface Reference Design
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.

Description & Features

Technical documentation

Support & Training

Order Now

See the Important Notice and Disclaimer covering reference designs and other TI resources.

Key Document


This TI Design demonstrates how to resolve and optimize signal integrity challenges typically found when sending SPI signals over longer distance on the same PCB or off PCB to another board in a noisy environment by transmitting SPI signals over LVDS interface. The concept offers high noise immunity, reduced EMI emission, and wider common-mode input tolerance.

  • Noise immunity and range extension for SPI Bus using LVDS interface
  • At least 3 meter communication range using SPI over LVDS vs. 0.5 meter range using standard SPI
  • Techniques to reduce propagation delay and improve SPI communication speed or range by routing SCLK back to SPI master
  • 10x lower power consumption compared to other differential signaling (RS-422/RS-485) solutions
  • –4-V to +5-V common-mode input voltage range offers high ground bounce immunity

See the Important Notice and Disclaimer covering reference designs and other TI resources.


Schematic/Block Diagram

Quickly understand overall system functionality.

Download Schematic

Test Data

Get results faster with test and simulation data that's been verified.

Download Test Data

Design Files

Download ready-to-use system files to speed your design process. Get Viewer.

Download Design Files

Order Now
Part Number Buy from Texas Instruments or Third Party Buy from Authorized Distributor Status

SN65LVDS31-33EVM :
Evaluation Module for SN65LVDS31 and SN65LVDS33


Pricing may vary.

Contact a Distributor  

TI Devices (3)

Order samples, get tools and find more information on the TI products in this reference design.

Part Number Name Product Family Sample & Buy Design Kits & Evaluation Modules
ADS8910B  18-Bit, 1-MSPS, 1-Ch SAR ADC with Internal VREF Buffer, Internal LDO and Enhanced SPI Interface  Analog-to-digital converters (ADCs)  Sample & Buy View Design Kits & Evaluation Modules
SN65LVDS31  400-Mbps LVDS quad high speed differential driver  Interface  Sample & Buy View Design Kits & Evaluation Modules
SN65LVDS33  Quad LVDS receiver with -4 to 5-V common-mode range  Interface  Sample & Buy View Design Kits & Evaluation Modules

CAD/CAE symbols

Part # Package | Pins CAD File (.bxl) STEP Model (.stp)
ADS8910B Download
SN65LVDS31 Download Download
Download Download
Download Download
SN65LVDS33 Download -
Download Download

Texas Instruments and Accelerated Designs, Inc. have collaborated together to provide TI customers with schematic symbols and PCB layout footprints for TI products.

Step 1: Download and install the free download.

Step 2: Download the Symbol and Footprint from the CAD.bxl file table.

Technical documentation

See the Important Notice and Disclaimer covering reference designs and other TI resources.

User guide (1)
Title Type Size (KB) Date
PDF 2332 19 Jul 2018
Design files (4)
Title Type Size (KB) Date
PDF 1000 18 Jul 2018
ZIP 760 18 Jul 2018
ZIP 154 18 Jul 2018
ZIP 356 18 Jul 2018

Support & training

TI E2E™ forums with technical support from TI engineers

Search our extensive online knowledge base where millions of technical questions and answers are available 24/7.

Search answers from TI experts

Content is provided 'AS IS' by the respective TI and Community contributors and does not constitute TI specifications.
See terms of use.

If you have questions about quality, packaging, or ordering TI products visit our Support page.

Technical articles