Product details

Resolution (Bits) 18 Number of input channels 1 Sample rate (Max) (kSPS) 1000 Interface type SPI, Enhanced SPI Architecture SAR Input type Differential Multi-channel configuration Rating Catalog Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 125 Power consumption (Typ) (mW) 21 Analog voltage AVDD (Min) (V) 3 SNR (dB) 102.5 Analog voltage AVDD (Max) (V) 5.5 INL (Max) (+/-LSB) 1.5 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5
Resolution (Bits) 18 Number of input channels 1 Sample rate (Max) (kSPS) 1000 Interface type SPI, Enhanced SPI Architecture SAR Input type Differential Multi-channel configuration Rating Catalog Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 125 Power consumption (Typ) (mW) 21 Analog voltage AVDD (Min) (V) 3 SNR (dB) 102.5 Analog voltage AVDD (Max) (V) 5.5 INL (Max) (+/-LSB) 1.5 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5
VQFN (RGE) 24 16 mm² 4 x 4
  • Resolution: 18-Bits
  • High Sample Rate With No Latency Output:
    • ADS8910B: 1-MSPS
    • ADS8912B: 500-kSPS
    • ADS8914B: 250-kSPS
  • Integrated LDO Enables Single-Supply Operation
  • Low-Power Reference Buffer With No Droop
  • Excellent AC and DC Performance:
    • SNR: 102.5-dB, THD: –125-dB
    • INL: ±0.5-LSB
    • DNL: ±0.2-LSB, 18-Bit No-Missing-Codes
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Single-Supply, Low-Power Operation
    (Includes Internal Reference Buffer and LDO)
    • ADS8910B : 21-mW at 1-MSPS
    • ADS8912B : 16-mW at 500-kSPS
    • ADS8914B : 14-mW at 250-kSPS
  • Enhanced-SPI Digital Interface
    • Interface SCLK: 20-MHz at 1-MSPS
    • Configurable Data Parity Output
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
  • Resolution: 18-Bits
  • High Sample Rate With No Latency Output:
    • ADS8910B: 1-MSPS
    • ADS8912B: 500-kSPS
    • ADS8914B: 250-kSPS
  • Integrated LDO Enables Single-Supply Operation
  • Low-Power Reference Buffer With No Droop
  • Excellent AC and DC Performance:
    • SNR: 102.5-dB, THD: –125-dB
    • INL: ±0.5-LSB
    • DNL: ±0.2-LSB, 18-Bit No-Missing-Codes
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Single-Supply, Low-Power Operation
    (Includes Internal Reference Buffer and LDO)
    • ADS8910B : 21-mW at 1-MSPS
    • ADS8912B : 16-mW at 500-kSPS
    • ADS8914B : 14-mW at 250-kSPS
  • Enhanced-SPI Digital Interface
    • Interface SCLK: 20-MHz at 1-MSPS
    • Configurable Data Parity Output
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

The ADS8910B, ADS8912B, and ADS8914B (ADS891xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 18-bit successive approximation register (SAR) analog-to-digital convertors (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS890xB (20-bit) and ADS892xB (16-bit) resolution variants.

The ADS891xB boost analog performance while maintaining high-resolution data transfer by using TI’s enhanced-SPI feature. Enhanced-SPI enables the ADS89xxB to achieve high throughput at lower clock speeds, thereby simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies clocking-in of data, thereby making this device an excellent choice for applications involving FPGAs, DSPs. The ADS89xxB is compatible with a standard SPI Interface.

The ADS891xB has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The ADS8910B, ADS8912B, and ADS8914B (ADS891xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 18-bit successive approximation register (SAR) analog-to-digital convertors (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS890xB (20-bit) and ADS892xB (16-bit) resolution variants.

The ADS891xB boost analog performance while maintaining high-resolution data transfer by using TI’s enhanced-SPI feature. Enhanced-SPI enables the ADS89xxB to achieve high throughput at lower clock speeds, thereby simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies clocking-in of data, thereby making this device an excellent choice for applications involving FPGAs, DSPs. The ADS89xxB is compatible with a standard SPI Interface.

The ADS891xB has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

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Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS8900BEVM-PDK — ADS8900B Fully-Differential Input, 20-Bit SAR ADC EVM Performance Demonstration Kit (PDK)

The ADS8900B evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the performance of the ADS8900B successive-approximation register (SAR) analog-to-digital converter (ADC), which is a fully-differential input, 20-bit, 1-MSPS device. (...)

Support software

Source Files for SBAA267

SBAC183.ZIP (103 KB)
Simulation model

ADS8910B IBIS Model

SBAM275.ZIP (22 KB) - IBIS Model
Simulation model

ADS8910B TINA-TI Spice Model

SBAM276.TSM (24 KB) - TINA-TI Spice Model
Simulation model

ADS8910B TINA-TI Reference Design

SBAM277.TSC (7079 KB) - TINA-TI Reference Design
Simulation model

±50mA to ±10A, 0V to 75V Common-Mode TINA-TI Spice Model

SBAM340.ZIP (136 KB) - TINA-TI Spice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Calculation tool

ADC-INPUT-CALC — Analog-to-digital converter (ADC) input driver design tool supporting multiple input types

ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and (...)
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Reference designs

TIDA-060017 — Transmitting SPI Signals Over LVDS Interface Reference Design

This reference design demonstrates how to resolve and optimize signal integrity challenges typically found when sending SPI signals over longer distance on the same PCB or off PCB to another board in a noisy environment by transmitting SPI signals over an LVDS interface. The concept offers (...)
Reference designs

TIDA-01051 — Reference Design Optimizing FPGA Utilization and Data Throughput for Automatic Test Equipment

The TIDA-01051 reference design is used to demonstrate optimized channel density, integration, power consumption, clock distribution and signal chain performance of very high channel count data acquisition (DAQ) systems such as those used in automatic test equipment (ATE). Using serializers, such (...)
Reference designs

TIDA-01050 — Optimized Analog Front End DAQ System Reference Design for 18 bit SAR Data Converters

The TIDA-01050 reference design aims to improve the integration, power consumption, performance, and clocking issues typically associated with automatic test equipment. This design is applicable to any ATE system but most applicable to systems requiring a large number of input channels.
Reference designs

TIDA-01052 — ADC Driver Reference Design Improving Full Scale THD Using Negative Supply

The TIDA-01052 reference design aims to highlight system performance increases seen using a negative voltage rail on the analog front end driver amplifiers rather than ground. This concept is relative to all analog front ends, however this design is aimed specifically at automatic test equipment.
Reference designs

TIPD211 — 20-bit, 1-MSPS, 4-Ch Small Form Factor Design for Test and Measurement Applications Reference Design

End equipment such as mixed signal SOC testers, memory testers, battery testers, liquid-crystal display (LCD) testers, benchtop equipment, high-density digital cards, high-density power cards, x-Ray, MRI, and so forth require multiple, fast, simultaneous sampling channels with excellent DC and AC (...)
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VQFN (RGE) 24 View options

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