3- to 7-VIN, 24-A IOUT, 0.95-VOUT, Space-grade current sharing point-of-load (POL) reference design


Design files


This is a 24-A DC/DC space power hardware reference design.

As FPGA and ASIC technology advances, the core voltage requirements get lower but the current demand is larger. The newest space grade FPGAs and ASICS require low voltage and high currents for their core power consumption. These high current requirements drive a need for space grade DC/DC power conversion circuitry.

  • Stand-alone space rated clock generation
  • Multiple configurations to evaluate current sharing of 2, 3 or 4 TPS50601A-SP POLs
  • Built-in current sense monitoring
Output voltage options TIDA-070005.1
Vin (Min) (V) 3
Vin (Max) (V) 7
Vout (Nom) (V) .95
Iout (Max) (A) 24
Output Power (W) 22.8
Isolated/Non-Isolated Non-Isolated
Input Type DC
Topology Buck- Synchronous
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUEN1A.PDF (12312 K)

Reference design overview and verified performance test data


Detailed schematic diagram for design layout and components


Complete listing of design components, reference designators, and manufacturers/part numbers


Detailed overview of design layout for component placement

TIDRYC6.ZIP (1779 K)

Files used for 3D models or 2D drawings of IC components

TIDCF58.ZIP (1801 K)

Design file that contains information on physical board layer of design PCB

TIDRYC5.ZIP (2072 K)

PCB layer plot file used for generating PCB design layout


Includes TI products in the design and potential alternatives.

Buck converters (integrated switch)

TPS50601A-SPRadiation-hardened QMLV, 3-V to 7-V input, 6-A synchronous step-down converter

Data sheet: PDF | HTML
D-type flip-flops

SN54HC74-SPDual D-type Positive-Edge-Triggered Flip-Flops With Clear And Preset

Data sheet: PDF | HTML
Inverting buffers & drivers

SN54HC04-SPSpace 6-ch, 2-V to 6-V inverters

Data sheet: PDF | HTML
Inverting buffers & drivers

SN74AHC1G04Single 2-V to 5.5-V inverter

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

TPS7A4501-SPRadiation-hardened, QMLV, 1.5-V to 20-V input 1.5-A low-dropout (LDO) regulator

Data sheet: PDF | HTML
Real-time clocks (RTCs) & timers

SE555MPrecision Timer

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
* Design guide 3- to 7-VIN, 0.95-VOUT, 24-A IOUT, Space-Grade Point-of-Load Reference Design (Rev. A) Jul. 26, 2019

Related design resources

Reference designs

PMP8904 TPS50601SPEVM MINI POL Reference Design TIDA-070001 3- to 7-VIN, Space-grade point-of-load (POL) reference design with redundant eFuse inputs for OCP TIDA-070002 20- to 40-VIN, 50-W Space-grade isolated flyback DC/DC over-current protection reference design

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