Radiation-hardness-assured (RHA), 3-V to 7-V input, 6-A synchronous step-down converter

TPS50601A-SP

ACTIVE

Product details

Vin (Min) (V) 3 Vin (Max) (V) 7 Vout (Min) (V) 0.804 Vout (Max) (V) 6.7 Iout (Max) (A) 6 Iq (Typ) (uA) 5000 Switching frequency (Min) (kHz) 100 Switching frequency (Max) (kHz) 1000 Features Enable, Frequency Synchronization, Over Current Protection, Power Good, Pre-Bias Start-Up, Soft Start Adjustable, Synchronous Rectification, Tracking, UVLO Adjustable Operating temperature range (C) -55 to 125, 25 to 25 Rating Space Regulated outputs (#) 1
Vin (Min) (V) 3 Vin (Max) (V) 7 Vout (Min) (V) 0.804 Vout (Max) (V) 6.7 Iout (Max) (A) 6 Iq (Typ) (uA) 5000 Switching frequency (Min) (kHz) 100 Switching frequency (Max) (kHz) 1000 Features Enable, Frequency Synchronization, Over Current Protection, Power Good, Pre-Bias Start-Up, Soft Start Adjustable, Synchronous Rectification, Tracking, UVLO Adjustable Operating temperature range (C) -55 to 125, 25 to 25 Rating Space Regulated outputs (#) 1
CFP (HKH) 20 94 mm² 12.7 x 2.9
  • 5962-10221:
    • Radiation hardened up to TID 100 krad(Si)
    • ELDRS free 100 krad(Si) – 10 mrad(Si)/s
    • Single lhup (SEL) Immune to
      LET = 75 MeV-cm2/mg
    • SEB and SEGR immune to 75 MeV-cm2/mg, SOA Curve Available
    • SET/SEFI Cross-section plot available
  • peak efficiency: 96.6% (VO = 3.3 V)
  • Integrated 58-mΩ/50-mΩ MOSFETs
  • Power rail: 3 to 7 V on VIN
  • 6-A Maximum output current
  • Flexible switching frequency options:
    • 100-kHz to 1-MHz Adjustable internal oscillator
    • External sync capability: 100 kHz to 1 MHz
    • Sync pin can be configured as a 500-kHz output for master/slave applications
  • 0.804-V ±1.5% Voltage reference overtemperature, radiation, and line and load regulation
  • Monotonic start-up into prebiased outputs
  • Adjustable soft start through external capacitor
  • Input enable and power-good output for power sequencing
  • Power good output monitor for undervoltage and overvoltage
  • Adjustable input undervoltage lockout (UVLO)
  • 20-Pin Ultra-small, thermally-enhanced ceramic flatpack package (hkh) for space applications
  • 5962-10221:
    • Radiation hardened up to TID 100 krad(Si)
    • ELDRS free 100 krad(Si) – 10 mrad(Si)/s
    • Single lhup (SEL) Immune to
      LET = 75 MeV-cm2/mg
    • SEB and SEGR immune to 75 MeV-cm2/mg, SOA Curve Available
    • SET/SEFI Cross-section plot available
  • peak efficiency: 96.6% (VO = 3.3 V)
  • Integrated 58-mΩ/50-mΩ MOSFETs
  • Power rail: 3 to 7 V on VIN
  • 6-A Maximum output current
  • Flexible switching frequency options:
    • 100-kHz to 1-MHz Adjustable internal oscillator
    • External sync capability: 100 kHz to 1 MHz
    • Sync pin can be configured as a 500-kHz output for master/slave applications
  • 0.804-V ±1.5% Voltage reference overtemperature, radiation, and line and load regulation
  • Monotonic start-up into prebiased outputs
  • Adjustable soft start through external capacitor
  • Input enable and power-good output for power sequencing
  • Power good output monitor for undervoltage and overvoltage
  • Adjustable input undervoltage lockout (UVLO)
  • 20-Pin Ultra-small, thermally-enhanced ceramic flatpack package (hkh) for space applications

The TPS50601A-SP is a radiation hardened, 7-V, 6-A synchronous step-down converter, which is optimized for small designs through high efficiency and integrating the high-side and low-side MOSFETs. Further space savings are achieved through current mode control, which reduces component count, and a high switching frequency, reducing the inductor’s footprint. The devices are offered in an ultra small, thermally enhanced 20-pin ceramic flatpack package.

The output voltage startup ramp is controlled by the SS/TR pin which allows operation as either a stand alone power supply or in tracking situations. Power sequencing is also possible by correctly configuring the enable and the open drain power good pins. In addition, the TPS50601A-SP can be configured in master-slave mode to provide up to 12-A of output current.

Cycle-by-cycle current limiting on the high-side FET protects the device in overload situations and is enhanced by a low-side sourcing current limit which prevents current runaway. There is also a low-side sinking current limit which turns off the low-side MOSFET to prevent excessive reverse current. Thermal shutdown disables the part when die temperature exceeds thermal shutdown temperature.

The TPS50601A-SP is a radiation hardened, 7-V, 6-A synchronous step-down converter, which is optimized for small designs through high efficiency and integrating the high-side and low-side MOSFETs. Further space savings are achieved through current mode control, which reduces component count, and a high switching frequency, reducing the inductor’s footprint. The devices are offered in an ultra small, thermally enhanced 20-pin ceramic flatpack package.

The output voltage startup ramp is controlled by the SS/TR pin which allows operation as either a stand alone power supply or in tracking situations. Power sequencing is also possible by correctly configuring the enable and the open drain power good pins. In addition, the TPS50601A-SP can be configured in master-slave mode to provide up to 12-A of output current.

Cycle-by-cycle current limiting on the high-side FET protects the device in overload situations and is enhanced by a low-side sourcing current limit which prevents current runaway. There is also a low-side sinking current limit which turns off the low-side MOSFET to prevent excessive reverse current. Thermal shutdown disables the part when die temperature exceeds thermal shutdown temperature.

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Technical documentation

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Type Title Date
* Data sheet TPS50601A-SP Radiation Hardened 3-V to 7-V Input, 6-A Synchronous Buck Converter datasheet (Rev. D) 21 Feb 2019
* Radiation & reliability report TPS50601A-SP Total Ionizing Dose (TID) Radiation Report (Rev. B) 30 May 2019
* Radiation & reliability report TPS50601A-SP Single-event Effects (SEE) Test Report (Rev. A) 05 Feb 2019
* Radiation & reliability report TPS50601A-SP Neutron Displacement Damage (NDD) Characterization Report (Rev. A) 24 Jul 2018
* SMD TPS50601A-SP SMD 5962-10221 21 Jun 2016
Selection guide TI Space Products (Rev. H) 27 Jan 2021
Application note DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 21 Aug 2020
User guide TPS50601A-SP Worst Case Analysis Unencrypted PSpice Average Model User's Guide (Rev. A) 18 Jun 2020
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations 18 May 2020
Application note Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form 18 May 2020
Application note Failure Containment in Spacecraft Point-of-Load Power Supplies 30 Apr 2020
Application note TPS50601x-SP Comparison Guide (Rev. A) 06 Apr 2020
Application note TPS50601A-SP Small Form Factor Buck Converter 01 Apr 2020
Technical article 4 trends in space-grade power management in 2020 12 Feb 2020
Application note Single-Event Effects Confidence Interval Calculations 14 Jan 2020
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing 17 Jun 2019
E-book Radiation Handbook for Electronics (Rev. A) 21 May 2019
Technical article When failure isn’t an option: power up your next satellite with integrated functionality and protection 30 Apr 2019
Technical article Minimize the impact of the MLCC shortage on your power application 29 Mar 2019
User guide TPS50601A-SP dual regulator evaluation module (EVM) 15 Feb 2019
User guide TSW12D1620EVM-CVAL User's Guide (Rev. A) 29 Jan 2019
Application note TI Space Rated Power Solution for Microsemi® RTG4™ FPGA (Rev. A) 27 Jul 2018
User guide TPS50601ASPEVM 6-A Regulator Evaluation Module 26 Sep 2017

Design & development

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Development kit

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Simulation model

TPS50601A-SP PSpice Transient Model (Rev. B)

SLVMCL3B.ZIP (32 KB) - PSpice Model
Simulation model

TPS50601A-SP PSpice Model (Rev. A)

SLVMCL4A.ZIP (20 KB) - PSpice Model
Simulation model

TPS50601A-SP TINA-TI Average Spice Model

SLVMCM3.ZIP (5 KB) - TINA-TI Spice Model
Simulation model

TPS50601A-SP TINA-TI Average Reference Design

SLVMCM4.TSC (584 KB) - TINA-TI Reference Design
Simulation model

TPS50601A-SP TINA-TI Transient Spice Model

SLVMCN0.ZIP (14 KB) - TINA-TI Spice Model
Simulation model

TPS50601A-SP TINA-TI Steady State Transient Reference Design

SLVMCN1.TSC (855 KB) - TINA-TI Reference Design
Simulation model

TPS50601A-SP TINA-TI Startup Transient Reference Design

SLVMCN2.TSC (855 KB) - TINA-TI Reference Design
Simulation model

TPS50601A-SP Worst Case Analysis Unencrypted PSpice Average Model

SLVMDC2.ZIP (43 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

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Calculation tool

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