K2E Clock Generation Reference Design


Design files


A single clock source should not be used to drive multiple clock inputs for a high-performance processor device, such as multicore ARM Cortex-A15 based 66AK2Ex and AM5K2Ex processors, since excessive loading, reflections, and noise will negatively impact performance. These can be avoided through the use of a differential clock tree instead of a single clock source. This design demonstrates clock generation for the 66AK2Ex and AM5K2Ex families of KeyStone II ARM A15 + DSP and ARM-only multicore processors by use of a differential clock tree. This design shows a complete clock tree resulting in generation of all clocks needed for SoC cores and interfaces.

  • Differential clock tree for 66AK2Ex and AM5K2Ex multicore ARM Cortex-A15 SoCs
  • Uses CDCM6208 to generate all clocks needed by SoC and peripherals
  • Uses CDCM6208 EVM Control GUI to generate control register values.
  • Complete system reference with schematics, BOM, design files, and HW Design Guide, implemented on the K2E EVM platform for testing and evaluation.

A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDU580.PDF (935 K)

Reference design overview and verified performance test data

TIDRB23.PDF (256 K)

Detailed schematic diagram for design layout and components

TIDRB25.PDF (83 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRB28.PDF (2213 K)

Files used for 3D models or 2D drawings of IC components

TIDC685.ZIP (26925 K)

Design file that contains information on physical board layer of design PCB

TIDC686.ZIP (11 K)

Design file that contains information on physical board layer of design PCB

TIDRB27.ZIP (7495 K)

PCB layer plot file used for generating PCB design layout


Includes TI products in the design and potential alternatives.

Arm-based processors

66AK2E05High performance multicore DSP+Arm - 4x Arm A15 cores, 1x C66x DSP core, NetCP, 10GbE

Data sheet document-pdfAcrobat PDF
Arm-based processors

AM5K2E02Sitara processor: dual-Arm Cortex-A15

Data sheet document-pdfAcrobat PDF
Arm-based processors

AM5K2E04Sitara processor: quad-Arm Cortex-A15

Data sheet document-pdfAcrobat PDF

Technical documentation

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Type Title Date
Design guide Reference Clock Generation for 66AK2E0x and AM5K2E0x Design Guide Oct. 08, 2014
Application note Hardware Design Guide for KeyStone II Devices Mar. 24, 2014
More literature Emulation Wiki -- In-depth technical and "how-to" articles, FAQs, etc. Mar. 24, 2011

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