Multicore DSP+Arm, 4x Arm A15 cores, 1x C66x DSP core, NetCP, 10GbE switch
Product details
Parameters
Features
- ARM® Cortex®-A15 MPCore™
CorePac- Up to Four ARM Cortex-A15 Processor Cores at
up to 1.4-GHz - 4MB L2 Cache Memory Shared by all Cortex-
A15 Processor Cores - Full Implementation of ARMv7-A Architecture
Instruction Set - 32KB L1 Instruction and Data Caches per Core
- AMBA 4.0 AXI Coherency Extension (ACE)
Master Port, Connected to MSMC (Multicore
Shared Memory Controller) for Low Latency
Access to SRAM and DDR3
- Up to Four ARM Cortex-A15 Processor Cores at
- One TMS320C66x DSP Core Subsystem (C66x
CorePacs), Each With- 1.4 GHz C66x Fixed/Floating-Point DSP Core
- 38.4 GMacs/Core for Fixed Point @ 1.2 GHz
- 19.2 GFlops/Core for Floating Point @
1.2 GHz
- Memory
- 32K Byte L1P Per CorePac
- 32K Byte L1D Per CorePac
- 512K Byte Local L2 Per CorePac
- 1.4 GHz C66x Fixed/Floating-Point DSP Core
- Multicore Shared Memory Controller (MSMC)
- 2 MB SRAM Memory Shared by DSP CorePacs
and ARM CorePac - Memory Protection Unit for Both SRAM and
DDR3_EMIF
- 2 MB SRAM Memory Shared by DSP CorePacs
- Multicore Navigator
- 8k Multi-Purpose Hardware Queues with Queue
Manager - One Packet-Based DMA Engine for Zero-
Overhead Transfers
- 8k Multi-Purpose Hardware Queues with Queue
- Network Coprocessor
- Packet Accelerator Enables Support for
- Transport Plane IPsec, GTP-U, SCTP,
PDCP - L2 User Plane PDCP (RoHC, Air Ciphering)
- 1 Gbps Wire Speed Throughput at 1.5
MPackets Per Second
- Transport Plane IPsec, GTP-U, SCTP,
- Security Accelerator Engine Enables Support for
- IPSec, SRTP, 3GPP and WiMAX
Air Interface, and SSL/TLS Security - ECB, CBC, CTR, F8, A5/3, CCM, GCM,
HMAC, CMAC, GMAC, AES, DES, 3DES,
Kasumi, SNOW 3G, SHA-1, SHA-2 (256-bit
Hash), MD5 - Up to 6.4 Gbps IPSec and 3 Gbps Air
Ciphering
- IPSec, SRTP, 3GPP and WiMAX
- Ethernet Subsystem
- Eight SGMII Ports with Wire Rate Switching
- IEEE1588 v2 (with Annex D/E/F) Support
- 8 Gbps Total Ingress/Egress Ethernet BW
from Core - Audio/Video Bridging (802.1Qav/D6.0)
- QOS Capability
- DSCP Priority Mapping
- Packet Accelerator Enables Support for
- Peripherals
- Two PCIe Gen2 Controllers with Support for
- Two Lanes per Controller
- Supports Up to 5 GBaud
- One HyperLink
- Supports Connections to Other KeyStone
Architecture Devices Providing Resource
Scalability - Supports Up to 50 GBaud
- Supports Connections to Other KeyStone
- 10-Gigabit Ethernet (10-GbE) Switch Subsystem
- Two SGMII/XFI Ports with Wire Rate
Switching and MACSEC Support - IEEE1588 v2 (with Annex D/E/F) Support
- Two SGMII/XFI Ports with Wire Rate
- One 72-Bit DDR3/DDR3L Interface with Speeds
Up to 1600 MTPS in DDR3 Mode - EMIF16 Interface
- Two USB 2.0/3.0 Controllers
- USIM Interface
- Two UART Interfaces
- Three I2C Interfaces
- 32 GPIO Pins
- Three SPI Interfaces
- One TSIP
- Support 1024 DS0s
- Support 2 Lanes at 32.768/16.3848.192
Mbps Per Lane
- Two PCIe Gen2 Controllers with Support for
- System Resources
- Three On-Chip PLLs
- SmartReflex Automatic Voltage Scaling
- Semaphore Module
- Thirteen 64-Bit Timers
- Five Enhanced Direct Memory Access (EDMA)
Modules
- Commercial Case Temperature:
- 0°C to 85°C
- Extended Case Temperature:
- –40°C to 100°C
Description
The 66AK2E0x is a high performance device based on TIs KeyStone II Multicore SoC Architecture, incorporating the most performance-optimized Cortex-A15 processor single-core or quad-core CorePac and C66x DSP core, that can run at a core speed of up to 1.4 GHz. TIs 66AK2E0x device enables a high performance, power-efficient and easy to use platform for developers of a broad range of applications such as enterprise grade networking end equipment, data center networking, avionics and defense, medical imaging, test and automation.
TIs KeyStone II Architecture provides a programmable platform integrating various subsystems (for example, ARM CorePac (Cortex-A15 Processor Quad Core CorePac), C66x CorePac, network processing, and uses a queue-based communication system that allows the device resources to operate efficiently and seamlessly. This unique device architecture also includes a TeraNet switch that enables the wide mix of system elements, from programmable cores to high-speed IO, to each operate at maximum efficiency with no blocking or stalling.
TIs C66x core launches a new era of DSP technology by combining fixed-point and floating point computational capability in the processor without sacrificing speed, size, or power consumption. The raw computational performance is an industry-leading 38.4 GMACS/core and 19.2 Gflops/core (@ 1.2 GHz operating frequency). It can execute 8 single precision floating point MAC operations per cycle and can perform double- and mixed-precision operations and is IEEE754 compliant. For fixed-point use, the C66x core has 4× the multiply accumulate (MAC) capability of C64×+ cores. The C66x CorePac incorporates 90 new instructions targeted for floating point and vector math oriented processing. These enhancements yield sizeable performance improvements in popular DSP kernels used in signal processing, mathematical, and image acquisition functions. The C66x core is backwards code compatible with TI's previous generation C6000 fixed and floating point DSP cores, ensuring software portability and shortened software development cycles for applications migrating to faster hardware.
The 66AK2E0x KeyStone II device integrates a large amount of on-chip memory. The Cortex-A15 processor cores each have 32KB of L1Data and 32KB of L1 Instruction cache. The up to four Cortex A15 cores in the ARM CorePac share a 4MB L2 Cache. In the DSP CorePac, in addition to 32KB of L1 program and 32KB of L1 data cache, there is 512KB of dedicated memory per core that can be configured as cache or as memory mapped RAM. The device also integrates 2MB of Multicore Shared Memory (MSMC) that can be used as a shared L3 SRAM. All L2 and MSMC memories incorporate error detection and error correction. For fast access to external memory, this device includes a 64-bit DDR-3 (72-bit with ECC support) external memory interface (EMIF) running at 1600 MTPS.
The device enables developers to use a variety of development and debugging tools that include GNU GCC, GDB, Open source Linux, Eclipse based debugging environment enabling kernel and user space debugging using a variety of Eclipse plug-ins including TI's industry leading IDE Code Composer Studio.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
eInfochips is a product engineering and design services company with over 20 years of experience, 500+ product developments, and over 40M deployments in 140 countries, across the world. The company has delivered turnkey technology solutions for many Fortune 500 companies, across multiple verticals (...)
Description
The Spectrum Digital XDS200 is the first model of the XDS200 family of debug probes (emulators) for TI processors. The XDS200 family features a balance of low cost with good performance between the super low cost XDS110 and the high performance XDS560v2, while supporting a wide variety of standards (...)
Features
The XDS200 is the mid-range family of JTAG debug probes (emulators) for TI processors. Designed to deliver good performance and the most common features that place it between the low cost XDS110 and the high performance XDS560v2, the XDS200 is the balanced solution to debug TI microcontrollers (...)
Description
The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).
The (...)
Features
XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)
Description
The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).
The (...)
Features
-
XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)
Description
The EVMK2EX is a full-featured development tool for 66AK2Exx and AM5K2Exx KeyStone II based SoCs. Get started developing general purpose embedded computing systems for industrial, mission critical, and networking applications today with this double-wide AMC form-factor evaluation board featuring a (...)
Features
EVMK2EX
- Example Applications- Avionics, embedded industrial controls, embedded networking, industrial routing & switching, and general purpose embedded computing systems
- Board size- Double Wide PICMG ® AMC form factor (7.11” x 2.89”)
- DDR memory- 4GB ECC DDR3 1600 SO-DIMM
- Development environment- DCode (...)
Software development
NOTE: K2x, C665x and C667x devices are now actively maintained on the Processor-SDK release stream. See links above.
Our Multicore Software Development Kits (MCSDK) provide highly-optimized bundles of foundational, platform-specific drivers to enable development on selected TI ARM and DSP devices (...)
Features
MCSDK
Provides foundational software for ARM+DSP devices. It encapsulates a collection of software elements and tools intended to enable customer application development.
The foundational components include:
- SYS/BIOS real-time embedded operating system on DSP cores
- Linux high-level operating system (...)
Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos. All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)
Features
Linux features
- Open Linux support
- Linux kernel and Bootloaders
- File system
- GUI-based application launcher
- Example applications, including:
- ARM benchmarks: Dhrystone, Linpack, Whetstone
- Cryptography: AES, 3DES, MD5, SHA
- Host tools including flash utility
- Code Composer Studio™ IDE for Linux development
- (...)
Features
The STK-MED contains optimized software for processing blocks commonly found in ultrasound and OCT medical imaging system. The STK-MED contains a detailed algorithm description with API documentation, benchmarks and a unit test bench for each software module.
The unit test benches can be run on both (...)
Features
The Multicore Video Infrastructure Demo package is built on the Multicore Software Development Kit (MCSDK) to enable the abstraction of platform, networking, and inter-core communications code. Its features include:
- Demonstration Apps
- Demo 1 shows multi channel high density operation with low (...)
Features
- Supports C66x TI DSP platform for little-endian
- Supports single-precision and double-precision floating point
- Supports complex inputs and real inputs
- Supports 1D, 2D and 3D FFT
- Supports Single-core and Multi-core
- API similar to FFTW, includes FFT plan and FFT execute
Features
- Types of functions included:
- Trigonometric and hyperbolic: Sin, Cos, Tan, Arctan, etc.
- Power, exponential, and logarithmic
- Reciprocal
- Square root
- Division
- Natural C Source Code
- Optimized C code with Intrinsics
- Hand-coded assembly-optimized routines
- C-callable routines, which can be inlined and are fully (...)
Features
Image Analysis
- Image boundry and perimeter
- Morphological operation
- Edge detection
- Image Histogram
- Image thresholding
Image filtering and format conversion
- Color space conversion
- Image convolution
- Image correlation
- Error diffusion
- Median filtering
- Pixel expansion
Image compression and decompression
- Forward and (...)
Features
Optimized DSP routines including functions for:
- Adaptive filtering
- Correlation
- FFT
- Filtering and convolution: FIR, biquad, IIR, convolution
- Math: Dot products, max value, min value, etc.
- Matrix operations
Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor (...)
Features
- Field-hardened and tested
- LINUX and WINDOWS installers
- XDC packaged and validated on a standard EVM in a Codec Engine-based test
- Both encoder and decoder are available
- All codecs are eXpressDSP™ compliant and implement one of the XDM 1.x interfaces
- Performance data specified in each codec Datasheet
Design tools & simulation
Reference designs
Design files
-
download K2E Clock Generation Reference Design Gerber.zip (26925KB) -
download K2E Clock Generation Reference Design Layer Plots (PCBs).zip (7495KB) -
download Power Sequencing for K2E Using UCD9090 Bill of Materials (BOM).zip (60KB) -
download Power Sequencing for K2E Using UCD9090 Configuration Files.zip (22KB) -
download Power Sequencing for K2E Using UCD9090 CAD Files.zip (4863KB)
Design files
-
download K2E Clock Generation Reference Design Bill of Materials (BOM).pdf (83KB) -
download K2E Clock Generation Reference Design Gerber.zip (26925KB) -
download K2E Clock Generation Reference Design Layer Plots (PCBs).zip (7495KB) -
download K2E Clock Generation Reference Design CAD Files.pdf (2213KB) -
download K2E Clock Generation Reference Design - CGC Configuration Files.zip (11KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
(ABD) | 1089 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
TI E2E™ forums with technical support from TI engineers
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