This design is for a 16-bit 1MSPS single-ended, multiplexed data acquisition system (DAQ) for dc inputs. The system is composed of a 16-bit successive-approximation-register (SAR) analog-to-digital converter (ADC), SAR ADC driver, reference driver, and multiplexer. The design shows the process to optimize a single-ended DAQ to achieve fast settling at a sampling rate of 1MSPS.
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Reference design overview and verified performance test data
Detailed schematic diagram for design layout and components
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Includes TI products in the design and potential alternatives.
| Type | Title | Date | |
|---|---|---|---|
| * | Design guide | Fast-Settling 16-Bit 1-MSPS Multiplexed Data Acquisition Design Guide | Aug. 04, 2015 |
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