SN74LVC1G14 Single Schmitt-Trigger Inverter | TI.com

SN74LVC1G14
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Single Schmitt-Trigger Inverter

Single Schmitt-Trigger Inverter - SN74LVC1G14
Datasheet
SN74LVC1G14 Single Schmitt-Trigger Inverter datasheet (Rev. Y)
 

Smaller and easy-to-manufacture package option available

This device is now available in a 0.8 x 0.8 x 0.4 (mm) DPW package for space-constrained designs. Order now

Description

This single Schmitt-trigger inverter is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G14 device contains one inverter and performs the Boolean function Y = A. The device functions as an independent inverter with Schmitt-trigger inputs, so the device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals to provide hysteresis (ΔVT) which makes the device tolerant to slow or noisy input signals.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

Features

  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Available in the Texas Instruments NanoFree™ Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.6 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial-Power-Down Mode Operation

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Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) IOL (Max) (mA) IOH (Max) (mA) ICC (uA) Input type Output type Features Data rate (Mbps) Rating Operating temperature range (C) Package Group
SN74LVC1G14 Order now LVC     1.65     5.5     1     32     -32     10     Schmitt-Trigger     Push-Pull     Balanced outputs
Very high speed (tpd 5-10ns)
Partial power down (Ioff)
Over-voltage tolerant inputs    		 300     Catalog     -40 to 125
-40 to 85    		 DSBGA | 4
DSBGA | 5
SC70 | 5
SON | 6
SON | 6
SOT-23 | 5
SOT-5X3 | 5
X2SON | 5    
SN74AUC1G14 Order now AUC     0.8     2.7     1     9     -9     10     Schmitt-Trigger     Push-Pull     Balanced outputs
Ultra high speed (tpd <5ns)
Partial power down (Ioff)
Over-voltage tolerant inputs    		 500     Catalog     -40 to 85     DSBGA | 5
SC70 | 5
SOT-23 | 5    
SN74AUP1G06 Order now AUP     0.8     3.6     1     4     0     0.9     Standard CMOS     Open-Drain     Very high speed (tpd 5-10ns)
Partial power down (Ioff)
Over-voltage tolerant inputs    		 200     Catalog     -40 to 85     DSBGA | 4
SC70 | 5
SON | 6
SON | 6
SOT-23 | 5
SOT-5X3 | 5
X2SON | 5    
SN74AUP1G14 Order now AUP     0.8     3.6     1     4     -4     0.9     Schmitt-Trigger     Push-Pull     Balanced outputs
Very high speed (tpd 5-10ns)
Partial power down (Ioff)
Over-voltage tolerant inputs    		 200     Catalog     -40 to 85     DSBGA | 4
SC70 | 5
SON | 6
SON | 6
SOT-23 | 5
SOT-5X3 | 5
X2SON | 5    
SN74LVC1G04 Order now LVC     1.65     5.5     1     32     -32     10     Standard CMOS     Push-Pull     Balanced outputs
Very high speed (tpd 5-10ns)
Partial power down (Ioff)
Over-voltage tolerant inputs    		 300     Catalog     -40 to 125
-40 to 85    		 DSBGA | 4
DSBGA | 5
SC70 | 5
SON | 6
SON | 6
SOT-23 | 5
SOT-5X3 | 5
X2SON | 5    
SN74LVC1G06 Order now LVC     1.65     5.5