UCD90320 Power Sequencer and System Manager Evaluation Module with Margining


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The UCD90320EVM-783 is designed for the evaluation of the UCD90320, a 32-rail PMBus power sequencer and system manager. Access to all of the I/O pins is provided via strip connectors for integration into complex systems using jumper wires. The UCD90320EVM provides a PMBus (power management bus) communication port to monitor, control, and configure the UCD90320 device using a USB interface adapter EVM (HPA172) and our Fusion Digital Power™ designer software.

  • Powered by single 5-V supply
  • Status LEDs on all digital I/O pins
  • 16 pull-up and 16 pull-down pins to configure GPI inputs or open-drain GPO output
  • 84 LEDs to monitor GPIO, Logic GPO, EN, DMON and MAR inputs and outputs
  • Strip connector I/O access
  • On-board TPS54678 and TPS7A84 LDO power stages for margining test
  • Supported by Fusion Digital Power Designer 7.0.27 or higher
UCD90320 32-Rail PMBus Power Sequencer and System Manager

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Evaluation board

UCD90320EVM-783 — UCD90320 32-Rail PMBus Power Sequencer and System Manager Evaluation Module

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IDE, configuration, compiler or debugger

UCD90320EVM Default Configuration — SLUC619.ZIP (89KB)

TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
* EVM User's guide UCD90320EVM-783 32-Rail Sequencer Development Board 28 Jul 2016
Certificate UCD90320EVM-783 EU Declaration of Conformity (DoC) 02 Jan 2019

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