LMK04610EVM

LMK04610 Ultra Low-Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual PLLs EVM

LMK04610EVM

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Overview

The LMK04610EVM features LMK04610 ultra Low-noise and low power JESD204B compliant Dual Loop Jitter Cleaner. With a power consumption of only 900 mW with all outputs running, LMK04610 supports sub-74 fs jitter (12 kHz to 20 MHz) using a low noise VCXO module. Integrated LDOs provide high PSRR that enables the use of DC/DC converters.

Features
  • Dual Loop Architecture with typical 60 fs rms from 10 kHz to 20 MHz  at 122.88 MHz output frequency
  • Integrated Loopfilter support easy prototyping
  • 0.9 W typical power consumption for 10 outputs at 122.88 MHz
  • Jumper configurable supplies with on-board LDOs and DCDC converters
  • GUI platform for full access to device registers

  • LMK04610EVM
  • USB2ANY Programmer

Clock jitter cleaners
LMK04610 Ultra low-noise and low power JESD204B compliant clock jitter cleaner with dual PLLs

 

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Get started

  1. Order the LMK04610EVM
  2. Download and install TICSPRO-SW
  3. Read the LMK04610EVM user’s guide
  4. Configure registers on TICSRPRO-SW

Order & start development

Evaluation board

LMK04610EVM — LMK04610 Ultra Low-Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual PLLs EVM

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Technical documentation

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Type Title Date
* EVM User's guide LMK04610 Evaluation Board User's Guide (Rev. A) 01 Feb 2017
Certificate LMK04610EVM EU Declaration of Conformity (DoC) 02 Jan 2019
Data sheet LMK04610 Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual-Loop PLLs datasheet (Rev. B) PDF | HTML 09 Jan 2018

Related design resources

Software development

APPLICATION SOFTWARE & FRAMEWORK
TICSPRO-SW Texas Instruments Clocks and Synthesizers (TICS) Pro Software

Support & training

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