In this tutorial, I will introduce the digital power peripherals, in particular, focusing on the digital pulse width modulation, or DPWM blocks. This presentation is an accompaniment to lab 2. We have already touched upon the ARM core, the flash memory, and the PMBus interface in previous tutorials. Now, we will focus on the DPWM module and its two associated output pins.

At the core of each member of the UCD3138 family are the digital control loop peripherals, also known as the digital power peripherals, or DPPs, for short. These are used for controlling the high speed voltage and current loops in the power supply. They are designed to replace the analog compensation network and PWM generation system that are employed in power supplies based upon analog power management controller ICs, as well as adding enhanced digital features to the system.

In many cases, after initialization by firmware at startup, the DPPs can control a power supply completely autonomously with no firmware intervention. This leaves processor resources for improved monitoring, communication, and other functions.

Here is the simplest configuration of the digital power peripherals, highlighting the key blocks involved in loop control. In the front end, the error ADC accepts a differential voltage signal as an input. It measures the difference between this input and a digitally controlled reference voltage and generates a digital error output.

The error ADC, or EADC, is a specialized, high speed, high resolution ADC with a small dynamic range, optimized for power supply error measurement. The filter takes the error signal and passes it through a PID-based digital filter which compensates for the characteristics of the external loop. This filter can be dynamically reprogrammed for changing power load source and circuit characteristics. It also offers non-linear response capability for better handling of transients.

The output of the compensator is passed to a digital PWM, or DPWM generator. The DPWM has two outputs which can be used in many different ways. There are modes for synchronous rectification, multiple phases, various bridge topologies, and LLC configurations. Some of the different options will be covered later in this series of tutorials. The UCD3138 device family supports multiple sets of digital power peripherals, affording the ability to control up to three feedback loops, either voltage or current, and drive eight outputs simultaneously.

In Lab 2, we will be focusing on the digital PWM block. The goals are to gain a basic understanding of the DPWM operation in open loop mode, output simple waveforms on the digital PWM output pins, use the memory debugger to change the waveform pulse widths. We covered the memory debugger in an earlier tutorial. It is part of the UCD3138 device GUI's toolkit. We will use the memory debugger's "hyperknob" feature to adjust the waveform pulse widths.