The ADC outputs alternating test
patterns defined in the TP0_A, TP1_A and TP0_B, TP1_B registers in place of the
CH[4:1] and CH[8:5] data, respectively.
Configure the test patterns
in TP0_A, TP1_A, TP0_B, and TP1_B
Set TP_EN_CH[4:1] = 1,
TP_MODE_CH[4:1] = 3 (address = 0x13), TP_EN_CH[8:5] = 1, and TP_MODE_CH[8:5]
= 3 (address = 0x18)