SBASAQ6 April   2024 ADS9813

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Timing Diagrams
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Inputs
        1. 6.3.1.1 Input Clamp Protection Circuit
        2. 6.3.1.2 Programmable Gain Amplifier (PGA)
        3. 6.3.1.3 Wide-Common-Mode Voltage Rejection Circuit
      2. 6.3.2 ADC Transfer Function
      3. 6.3.3 ADC Sampling Clock Input
      4. 6.3.4 Synchronizing Multiple ADCs
      5. 6.3.5 Reference Voltage
      6. 6.3.6 Test Patterns for Data Interface
        1. 6.3.6.1 Fixed Pattern
        2. 6.3.6.2 Digital Ramp
        3. 6.3.6.3 Alternating Test Pattern
    4. 6.4 Device Functional Modes
      1. 6.4.1 Reset
      2. 6.4.2 Power-Down
      3. 6.4.3 Initialization Sequence
      4. 6.4.4 Normal Operation
    5. 6.5 Programming
      1. 6.5.1 Register Write
      2. 6.5.2 Register Read
      3. 6.5.3 Multiple Devices in a Daisy-Chain Topology for SPI Configuration
        1. 6.5.3.1 Register Write With Daisy-Chain
        2. 6.5.3.2 Register Read With Daisy-Chain
  8. 7 Register Map
    1. 7.1 Register Bank 0
    2. 7.2 Register Bank 1
    3. 7.3 Register Bank 2
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Parametric Measurement Unit (PMU)
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

at AVDD_5V = 4.75V to 5.25V, VDD_1V8 = 1.75V to 1.85V, IOVDD = 1.15V to 1.85V, VREF = 4.096V (internal or external), and maximum throughput (unless otherwise noted); minimum and maximum values at TA = –40°C to +125°C; typical values at TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUTS
RIN Input impedance All input ranges 0.85 1 1.15 MΩ
Input impedance thermal drift All input ranges 10 25 ppm/°C
Input capacitance 10 pF
ANALOG INPUT FILTER
BW(-3 dB) Analog input LPF bandwidth
–3 dB		 Low-bandwidth filter, all input ranges 21 kHz
Wide-bandwidth filter, input range = ±2.5V 182
Wide-bandwidth filter, input range = ±3.5V 240
Wide-bandwidth filter, input range = ±5V 320
Wide-bandwidth filter, input range = ±7V 400
Wide-bandwidth filter, input range = ±10V 385
Wide-bandwidth filter, input range = ±12V 375
DC PERFORMANCE
Resolution No missing codes 18 Bits
DNL Differential nonlinearity Wide CM enabled and disabled, all ranges –0.99 ±0.5 0.99 LSB
INL Integral nonlinearity Wide CM enabled and disabled, all ranges, TA = 0℃ to 70℃  –4 ±1.5 4 LSB
Wide-CM enabled and disabled, all ranges, TA = –40℃ to 125℃  –4.5 ±1.5 4.5 LSB
Offset error Wide CM disabled, range = ±2.5V –175 ±90 175 LSB
Wide CM enabled, range = ±2.5V ±120
Wide CM disabled, range= ±3.5V –100 ±60 100
Wide CM enabled, range= ±3.5V ±80
Wide CM disabled, range = ±5V –50 ±10 50
Wide CM enabled, range = ±5V ±60
Wide CM enabled, range = ±7V –100 ±35 100
Wide CM enabled, range = ±10V –50 ±10 50
Wide CM enabled, range = ±12V –75 ±15 75
Offset error matching Wide CM disabled, range = ±2.5V 0 300 512 LSB
Wide CM enabled, range = ±2.5V 0 450 750
Wide CM disabled, range = ±3.5V 0 150 256
Wide CM enabled, range = ±3.5V 0 300 512
Wide CM disabled, range = ±5V 0 25 64
Wide CM enabled, range = ±5V 0 175 296
Wide CM enabled, range = ±7V 0 100 200
Wide CM enabled, range = ±10V 0 25 64
Wide CM enabled, range = ±12V 0 35 96
Offset error thermal drift Wide CM enabled and disabled, all ranges 0.5 1.5 ppm/°C
Gain error Wide CM disabled, range = ±2.5V, ±3.5V, and ±5V –130 ±48 130 LSB
Wide CM enabled, range = ±2.5V, ±3.5V, and ±5V ±100
Wide CM enabled, range = ±7V, ±10V, ±12V –130 ±48 130
Gain error matching Wide CM disabled, range = ±2.5V, ±3.5V, and ±5V 0 ±96 200 LSB
Wide CM enabled, range = ±2.5V, ±3.5V, and ±5V 0 ±200 600
Wide CM enabled, range = ±7V, ±10V, ±12V 0 ±96 200
Gain error thermal drift Wide CM enabled and disabled, all ranges 0.7 3 ppm/°C
AC PERFORMANCE
SNR Signal-to-noise ratio Low-noise filter, fIN = 2kHz, range = ±2.5V 86.7 89.5 dBFS
Low-noise filter, fIN = 2kHz, range = ±3.5V 87.8 90.5
Low-noise filter, fIN = 2kHz, range = ±5V 88.5 91.4
Low-noise filter, fIN = 2kHz, range = ±7V 89.3 91.3
Low-noise filter, fIN = 2kHz, range = ±10V 89.9 91.8
Low-noise filter, fIN = 2kHz, range = ±12V 90 92
Wide-bandwidth filter, fIN = 2kHz, range = ±2.5V 79 82.5
Wide-bandwidth filter, fIN = 2kHz, range = ±3.5V 80 83.5
Wide-bandwidth filter, fIN = 2kHz, range = ±5V 80.5 84.5
Wide-bandwidth filter, fIN = 2kHz, range = ±7V 81.5 83.5
Wide-bandwidth filter, fIN = 2kHz, range = ±10V 83 85
Wide-bandwidth filter, fIN = 2 kHz, range = ±12V 83.5 85.5
SINAD Signal-to-noise + distortion ratio Low-noise filter, fIN = 2kHz, range = ±2.5V 85.7 88.9 dB
Low-noise filter, fIN = 2kHz, range = ±3.5V 86.7 89.9
Low-noise filter, fIN = 2kHz, range = ±5V 87.3 90.7
Low-noise filter, fIN = 2kHz, range = ±7V 88.0 90.6
Low-noise filter, fIN = 2kHz, range = ±10V 88.5 91.1
Low-noise filter, fIN = 2kHz, range = ±12V 88.6 91.3
Wide-bandwidth filter, fIN = 2kHz, range = ±2.5V 78.6 82.2
Wide-bandwidth filter, fIN = 2kHz, range = ±3.5V 79.5 83.2
Wide-bandwidth filter, fIN = 2kHz, range = ±5V 80.0 84.2
Wide-bandwidth filter, fIN = 2kHz, range = ±7V 80.9 83.2
Wide-bandwidth filter, fIN = 2kHz, range = ±10V 82.3 84.7
Wide-bandwidth filter, fIN = 2kHz, range = ±12V 82.8 85.1
THD Total harmonic distortion Low-noise filter, fIN = 2kHz, all ranges –113 dB
Wide-bandwidth filter, fIN = 2kHz, all ranges –113
SFDR Spurious-free dynamic range fIN = 2kHz 113 dB
CMRR At dc –70 dB
Isolation crosstalk At dc –100 dB
INTERNAL REFERENCE
VREF(1) Voltage on REFIO pin (configured as output) 1µF capacitor on REFIO pin, TA = 25°C 4.092 4.096 4.1 V
Reference temperature drift 10 25 ppm/°C
DIGITAL INPUTS
VIL Input low logic level –0.3 0.3 IOVDD V
VIH Input high logic level 0.7 IOVDD IOVDD V
Input current –1 0.1 1 µA
Input capacitance 6 pF
LVDS SAMPLING CLOCK INPUT
VTH High-level input voltage 100 mV
VTL Low-level input voltage –100 mV
VICM Input common-mode voltage 0.3 1.2 1.4 V
DIGITAL OUTPUTS
VOL Output low logic level IOL = 500µA sink 0 0.2 IOVDD V
VOH Output high logic level IOH = 500µA source 0.8 IOVDD IOVDD V
POWER SUPPLY
Total power dissipation Maximum throughput 232 304 mW
IAVDD_5V Supply current from AVDD_5V Maximum throughput, internal reference 26 32 mA
Power-down 0.2 2
IVDD_1V8 Supply current from VDD_1V8 Maximum throughput, internal reference 50 70 mA
Power-down 0.2 8
IIOVDD Supply current from IOVDD Maximum throughput 7 10 mA
Power-down 0.1 2
(1) Does not include the variation in voltage resulting from solder shift effects.