SLLS201I May   1995  – April 2024 AM26LV31

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Active high and active low
      2. 7.3.2 Operates from a 3.3-V Supply with up to 5-V Logic
      3. 7.3.3 High Speed Transmission
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • NS|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Parameter Measurement Information

GUID-1DAC19B5-6FC6-4925-A517-8E7EF2555E75-low.gif Figure 6-1 Differential and Common-Mode Output Voltages
GUID-0E17F813-394C-435D-93AE-B0A3A8D8C21D-low.gif
A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 10MHz, ZO = 50Ω, 50%v duty cycle, tr and tf ≤ 10ns.
Figure 6-2 Test Circuit and Voltage Waveforms, tPHL and tPLH
GUID-C99A21A4-5F14-491F-B71E-677B25EBCF96-low.gif
A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1MHz, ZO = 50Ω, 50%v duty cycle, tr and tf (10% to 90%) ≤ 2ns.
C. To test the active-low enable G, ground G and apply an inverted waveform to G.
Figure 6-3 Test Circuit and Voltage Waveforms, tPZH and tPHZ
GUID-AA06D756-6948-4FA3-9557-8989FB450933-low.gif
A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1MHz, ZO = 50Ω, 50%v duty cycle, tr and tf (10% to 90%) ≤ 2ns.
C. To test the active-low enable G, ground G and apply an inverted waveform to G.
Figure 6-4 Test Circuit and Voltage Waveforms, tPZL and tPLZ