SBASAQ5A june   2023  – august 2023 AMC3311

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Timing Diagram
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
      4. 7.3.4 Isolated DC/DC Converter
      5. 7.3.5 Diagnostic Output and Fail-Safe Behavior
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Filter Design
        2. 8.2.2.2 Differential to Single-Ended Output Conversion
      3. 8.2.3 Application Curve
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at VDD = 3.3 V, IN = 0 V to 2 V, and fIN = 10 kHz (unless otherwise noted)

GUID-20230724-SS0I-3S4G-TPCW-MKWRRWDNRGJJ-low.png
 
 
 
Figure 6-5 Output Voltage vs Input Voltage
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Figure 6-7 Input Bias Current vs Supply Voltage
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Figure 6-9 Input Capacitance vs Input Signal Frequency
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Figure 6-11 Output Common-Mode Voltage vs Temperature
GUID-20230801-SS0I-GVTM-QHFV-MLN6TXKF3T4R-low.png
 
Figure 6-13 Output Phase vs Input Frequency
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Figure 6-15 Output Bandwidth vs Temperature
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Figure 6-17 Offset Error vs Temperature
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Figure 6-19 Gain Error vs Temperature
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Figure 6-21 Nonlinearity vs Supply Voltage
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Figure 6-23 Signal to Noise Ratio vs Input Voltage
GUID-20230801-SS0I-8F5V-2V2B-NP6B0LN78HV9-low.svg
VIN = 2 V
Figure 6-25 Signal-to-Noise Ratio vs Temperature
GUID-20230801-SS0I-RDMC-LFQZ-LSC9JMTFWPX2-low.svg
 
Figure 6-27 Total Harmonic Distortion vs Temperature
GUID-20230801-SS0I-VHC4-VZJB-D23HFJ9TNLQK-low.svg
 
Figure 6-29 Power-Supply Rejection Ratio vs Ripple Frequency
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Figure 6-31 Input Supply Current vs Supply Voltage
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Figure 6-33 High-Side LDO Line Regulation
GUID-20230801-SS0I-NGWD-RDWG-TVPR6H78CSPB-low.png
 
Figure 6-35 Output Rise and Fall Time vs Supply Voltage
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Figure 6-37 VIN to VOUT Signal Delay Time vs Supply Voltage
GUID-20230802-SS0I-HX3Q-WMMQ-WMVJ7VSMZWZ0-low.svg
Total uncalibrated output error is defined as:
(VOUT – VIN × G) / (VClipping × G), where G is the nominal gain of the device (1 V/V) and VClipping is 2.516 V
Figure 6-6 Total Uncalibrated Output Error vs Input Voltage
GUID-20230724-SS0I-ZN1X-2L6H-KPWSC64BJJ98-low.png
 
Figure 6-8 Input Bias Current vs Temperature
GUID-20230724-SS0I-RRXJ-0L1B-N894DD4LPWCQ-low.png
 
Figure 6-10 Output Common-Mode Voltage vs Supply Voltage
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Figure 6-12 Normalized Gain vs Input Frequency
GUID-20230801-SS0I-P9HB-WTRW-ZQB64JHR9HC1-low.svg
 
Figure 6-14 Output Bandwidth vs Supply Voltage
GUID-20230724-SS0I-K3M8-8NKM-JMNNVJKFC81Q-low.png
 
Figure 6-16 Offset Error vs Supply Voltage
GUID-20230724-SS0I-DMP5-CTNP-44ZJTP3HP6F9-low.png
 
Figure 6-18 Gain Error vs Supply Voltage
GUID-20230801-SS0I-BRW2-4QDF-LXWXZ7W0H0MH-low.png
 
Figure 6-20 Nonlinearity vs Input Voltage
GUID-20230724-SS0I-PSZD-7M43-HWT3MG2M2KBF-low.svg
 
Figure 6-22 Nonlinearity vs Temperature
GUID-20230801-SS0I-ST0H-P3MV-KNQG0Z6XLG2C-low.png
VIN = 2 V
Figure 6-24 Signal-to-Noise Ratio vs Supply Voltage
GUID-20230801-SS0I-NGHJ-0H4G-6R1VHHSHRWRZ-low.svg
 
Figure 6-26 Total Harmonic Distortion vs Supply Voltage
GUID-20230801-SS0I-2T74-RZZB-ZS4LKZ5NRRJC-low.svg
 
Figure 6-28 Input-Referred Noise Density vs Frequency
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Figure 6-30 Power-Supply Rejection Ratio vs Temperature
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Figure 6-32 Input Supply Current vs Temperature
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Figure 6-34 High-Side LDO Load Regulation
GUID-20230801-SS0I-ZRDH-QW9S-LGGGSK5CF4PV-low.svg
 
Figure 6-36 Output Rise and Fall Time vs Temperature
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Figure 6-38 VIN to VOUT Signal Delay Time vs Temperature