SLUSF77 December   2023 BQ25960H

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Description (continued)
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Charging System
      2. 8.3.2  Battery Charging Profile
      3. 8.3.3  Device Power Up
      4. 8.3.4  Device HIZ State
      5. 8.3.5  Dual Input Bi-Directional Power Path Management
        1. 8.3.5.1 ACDRV Turn-On Condition
        2. 8.3.5.2 Single Input from VAC to VBUS without ACFET-RBFET
        3. 8.3.5.3 Single Input with ACFET1
        4. 8.3.5.4 Dual Input with ACFET1-RBFET1
        5. 8.3.5.5 Dual Input with ACFET1-RBFET1 and ACFET2-RBFET2
        6. 8.3.5.6 OTG and Reverse TX Mode Operation
      6. 8.3.6  Bypass Mode Operation
      7. 8.3.7  Charging Start-Up
      8. 8.3.8  Adapter Removal
      9. 8.3.9  Integrated 16-Bit ADC for Monitoring and Smart Adapter Feedback
      10. 8.3.10 Device Modes and Protection Status
        1. 8.3.10.1 Input Overvoltage, Overcurrent, Undercurrent, Reverse-Current and Short-Circuit Protection
        2. 8.3.10.2 Battery Overvoltage and Overcurrent Protection
        3. 8.3.10.3 IC Internal Thermal Shutdown, TSBUS, and TSBAT Temperature Monitoring
      11. 8.3.11 INT Pin, STAT, FLAG, and MASK Registers
      12. 8.3.12 Dual Charger Operation Using Primary and Secondary Modes
      13. 8.3.13 CDRVH and CDRVL_ADDRMS Functions
    4. 8.4 Programming
      1. 8.4.1 F/S Mode Protocol
    5. 8.5 Register Maps
      1. 8.5.1 I2C Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Standalone Application Information (for use with main charger)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Package Option Addendum
    2. 14.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

8.3.5.6 OTG and Reverse TX Mode Operation

When the main charger is in OTG or reverse TX Mode, the input power MUX (ACFET-RBFET) also controls which port is desired for OTG output.

To enter OTG or reverse TX Mode, the host should follow the steps below:

  1. Host writes EN_OTG =1
  2. BQ25960H sets DIS_ACDRV_BOTH =1
  3. Host writes DIS_ACDRV_BOTH=0, and then writes ACDRV1_STAT=1 or ACDRV2_STAT=1 depending on which port is desired for OTG or reverse TX output
  4. Host enables OTG Mode on main charger
  5. If VBUSOVP or VACOVP fault occurs, ACDRV will be disabled but EN_OTG is still '1'. Host needs to write ACDRV1_STAT high or ACDRV2_STAT high when the fault is cleared. Set VAC1OVP and VAC2OVP to the same threshold in the OTG Mode
  6. EN_OTG is cleared when watchdog timer expires

To exit OTG or Reverse TX Mode, the host should follow the steps below:

  1. Turn off main OTG or reverse TX source
  2. Turn on VBUS pulldown resistor (RVBUS_PD) by setting BUS_PD_EN=1 or VAC pulldown resistor RVAC_PD by setting VAC1_PD_EN=1 or VAC2_PD_EN=1, depending on which port is to be discharged
  3. Wait for VBUS and VAC to be discharged
  4. Turn off ACDRV by setting ACDRV1_STAT=0 or ACDRV2_STAT=0
  5. Exit OTG Mode by setting EN_OTG=0