SNIS133E September   2003  – February 2024 LM95010

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Operating Ratings
    3. 5.3 DC Electrical Characteristics
    4. 5.4 AC Electrical Characteristics
    5. 5.5 Typical Performance Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  SensorPath BUS SWD
      2. 6.3.2  SensorPath BIT SIGNALING
      3. 6.3.3  Bus Inactive
      4. 6.3.4  Data Bit 0 and 1
      5. 6.3.5  Start Bit
      6. 6.3.6  Attention Request
      7. 6.3.7  Bus Reset
      8. 6.3.8  SensorPath BUS TRANSACTIONS
      9. 6.3.9  Bus Reset Operation
      10. 6.3.10 Read Transaction
      11. 6.3.11 Write Transaction
      12. 6.3.12 Read and Write Transaction Exceptions
      13. 6.3.13 Attention Request Transaction
  8. 7 Register Set
    1. 7.1  Fixed Number Setting
    2. 7.2  Register Set Summary
    3. 7.3  Device Reset Operation
    4. 7.4  Device Number (Addr 00o)
    5. 7.5  Manufacturer ID (Addr 01o)
    6. 7.6  Device ID (Addr 02o)
    7. 7.7  Capabilities Fixed (Addr 03o)
    8. 7.8  Device Status (Addr 04o)
    9. 7.9  Device Control (Addr 05o)
    10. 7.10 Temperature Measurement Function (TYPE - 0001)
    11. 7.11 Operation
    12. 7.12 Temperature Capabilities (Addr 10o)
    13. 7.13 Temperature Data Readout (Addr 11o)
    14. 7.14 Temperature Control (Addr 12o)
    15. 7.15 Conversion Rate (Addr 40o)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Mounting Considerations
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.11 Write Transaction

In a write transaction, the master writes data to a register at a specified address in the LM95010. A write transaction begins with a Start Bit and ends with an ACK Data Bit, as show in Figure 6-4.

  • Device Number This is the address of the slave device accessed. Address "000" is a broadcast address and is responded to by all the slave devices. The LM95010 responds to broadcast messages to the Device Control Register.
  • Internal Address This is the register address in the LM95010 that will be written.
  • Read/ Write (R/ W) A "0" data bit directs a write transaction.
  • Data Bits This is the data written to the LM95010 register, are driven by the master. Data is transferred serially with the most significant bit first. The number of data bits may vary from one address to another, based on the size of the register in the LM95010. This allows throughput optimization based on the information that needs to be written.
    • The LM95010 supports 8-bit or 16-bit data fields, as described in Section 7.
  • Even Parity (EP) This data bit is based on all preceding bits (Device Number, Internal Address, Read/ Write and Data bits) and the Even Parity bit itself. The parity (number of 1's) of all the preceding bits and the parity bit must be even - i.e. the result must be 0. During a write transaction, the EP bit is sent by the master to the LM95010 to allow the LM95010 to check the received data before using it.
  • Acknowledge (ACK) During the write transaction the ACK bit is sent by the LM95010 indicating to the master that the EP was received and was found correct, and that no conflict was detected on the bus (excluding Attention Request - see Section 6.3.13). A write transfer is considered "completed" only when the ACK bit is generated. A transaction that was not positively acknowledged is not considered complete by the LM95010 (i.e. internal operation related to the transaction are not performed) and the following are performed:
    • The BER bit in the LM95010 Device Status register is set;
    • The LM95010 generates an Attention Request before, or together with the Start Bit of the next transaction
    A transaction that was not positively acknowledged is also not considered "complete" by the master (i.e. internal operations related to the transaction are not performed). The transaction may be repeated by the master, after detecting the source of the Attention Request (the LM95010 that has a set BER bit in the Device Status register). Note that the SensorPath protocol neither forces, nor automates re-execution of the transaction by the master.The values of the ACK bit are:
    • 1: Data was received correctly;
    • 0: An error was detected (no-acknowledge).
GUID-E3C91921-F7FD-4793-92B6-97A2EFF2A0F2-low.gifFigure 6-4 Write Transaction, master write data to LM95010