SNIS133E September   2003  – February 2024 LM95010

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Operating Ratings
    3. 5.3 DC Electrical Characteristics
    4. 5.4 AC Electrical Characteristics
    5. 5.5 Typical Performance Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  SensorPath BUS SWD
      2. 6.3.2  SensorPath BIT SIGNALING
      3. 6.3.3  Bus Inactive
      4. 6.3.4  Data Bit 0 and 1
      5. 6.3.5  Start Bit
      6. 6.3.6  Attention Request
      7. 6.3.7  Bus Reset
      8. 6.3.8  SensorPath BUS TRANSACTIONS
      9. 6.3.9  Bus Reset Operation
      10. 6.3.10 Read Transaction
      11. 6.3.11 Write Transaction
      12. 6.3.12 Read and Write Transaction Exceptions
      13. 6.3.13 Attention Request Transaction
  8. Register Set
    1. 7.1  Fixed Number Setting
    2. 7.2  Register Set Summary
    3. 7.3  Device Reset Operation
    4. 7.4  Device Number (Addr 00o)
    5. 7.5  Manufacturer ID (Addr 01o)
    6. 7.6  Device ID (Addr 02o)
    7. 7.7  Capabilities Fixed (Addr 03o)
    8. 7.8  Device Status (Addr 04o)
    9. 7.9  Device Control (Addr 05o)
    10. 7.10 Temperature Measurement Function (TYPE - 0001)
    11. 7.11 Operation
    12. 7.12 Temperature Capabilities (Addr 10o)
    13. 7.13 Temperature Data Readout (Addr 11o)
    14. 7.14 Temperature Control (Addr 12o)
    15. 7.15 Conversion Rate (Addr 40o)
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Mounting Considerations
  10. Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Bus Reset Operation

A Bus Reset Operation is global on the bus and affects only the communication interface of all the devices connected to it. The Bus Reset operation does not affect either the contents of the device registers, or device operation, to the extent defined in LM95010 Register Set, see Section 7.

The Bus Reset operation is performed by generating a Reset signal on the bus. The master must apply Reset after power-up, and before it starts operation. The Reset signal end will be monitored by all the LM95010s on the bus.

After the Reset Signal Section 6.3.2 requires that the master send a sequence of 8 Data Bits with a value of "0", without a preceding Start Bit. This is required to enable slaves that "train" their clocks to the bit timing. The LM95010 does not require nor does it support clock training.

GUID-DE8CECAB-9C9E-41D7-B4F8-F0A1C14D946F-low.gifFigure 6-2 Bus Reset Transaction