SLLS736B July   2006  – March 2024 SN65MLVD047A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Package Dissipation Ratings
    5. 5.5 Thermal Information
    6. 5.6 Device Electrical Characteristics
    7. 5.7 Device Electrical Characteristics
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Synchroization Clock in AdvancedTCA
      2. 8.1.2 Multipoint Configuration
      3. 8.1.3 Multidrop Configuration
      4. 8.1.4 Unused Channel
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The SN65MLVD047A is a quadruple line driver that complies with the TIA/EIA-899 standard, Electrical Characteristics of Multipoint-Low-Voltage Differential Signaling (M−LVDS). The output current of this M−LVDS device has been increased, in comparison to standard LVDS compliant devices, in order to support doubly terminated transmission lines and heavily loaded backplane bus applications. Backplane applications generally require impedance matching termination resistors at both ends of the bus. The effective impedance of a doubly terminated bus can be as low as 30Ω due to the bus terminations, as well as the capacitive load of bus interface devices. SN65MLVD047A drivers allow for operation with loads as low as 30Ω. The SN65MLVD047A devices allow for multiple drivers to be present on a single bus. SN65MLVD047A drivers are high impedance when disabled or unpowered. Driver edge rate control is incorporated to support operation. The M−LVDS standard allows up to 32 nodes (drivers and/or receivers) to be connected to the same media in a backplane when multiple bus stubs are expected from the main transmission line to interface devices. The SN65MLVD047A provides 9kV ESD protection on all bus pins.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
SN65MLVD047APW (TSSOP, 16)5mm × 6.4mm
D (SOIC, 16)9.9mm × 6mm
(1) For more information, Section 11.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.


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