SLVS736C February   2008  – October 2023 TPS2550 , TPS2551

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Overcurrent
      2. 9.3.2 Reverse-Voltage Protection
      3. 9.3.3 FAULT Response
      4. 9.3.4 Undervoltage Lockout (UVLO)
      5. 9.3.5 ENABLE ( EN or EN)
      6. 9.3.6 Thermal Sense
      7. 9.3.7 Device Functional Modes
    4. 9.4 Programming
      1. 9.4.1 Programming the Current-Limit Threshold
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Two-Level Current-Limit Circuit
      2. 10.2.2 Design Requirements
      3. 10.2.3 Detail Design Procedures
        1. 10.2.3.1 Designing Above a Minimum Current Limit
        2. 10.2.3.2 Designing Below a Maximum Current Limit
        3. 10.2.3.3 Input and Output Capacitance
      4. 10.2.4 Auto-Retry Functionality
      5. 10.2.5 Latch-Off Functionality
      6. 10.2.6 Typical Application as USB Power Switch
        1. 10.2.6.1 Design Requirements
          1. 10.2.6.1.1 USB Power-Distribution Requirements
        2. 10.2.6.2 Detail Design Procedures
          1. 10.2.6.2.1 Universal Serial Bus (USB) Power-Distribution Requirements
    3. 10.3 Power Supply Recommendations
      1. 10.3.1 Self-Powered and Bus-Powered Hubs
      2. 10.3.2 Low-Power Bus-Powered and High-Power Bus-Powered Functions
      3. 10.3.3 Power Dissipation and Junction Temperature
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.3.3 Power Dissipation and Junction Temperature

The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It is good design practice to estimate power dissipation and junction temperature. The below analysis gives an approximation for calculating junction temperature based on the power dissipation in the package. However, it is important to note that thermal analysis is strongly dependent on additional system level factors. Such factors include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating power. Good thermal design practice must include all system level factors in addition to individual component analysis.

Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(on) from the typical characteristics graph. Using this value, the power dissipation can be calculated by:

PD = rDS(on) × IOUT2

Where:

PD = Total power dissipation (W)

rDS(on) = Power switch on-resistance (Ω)

IOUT = Maximum current-limit threshold (A)

This step calculates the total power dissipation of the N-channel MOSFET.

Finally, calculate the junction temperature:

TJ = PD × RΘJA + TA

Where:

TA = Ambient temperature (°C)

RΘJA = Thermal resistance (°C/W)

PD = Total power dissipation (W)

Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat the calculation using the "refined" rDS(on) from the previous calculation as the new estimate. Two or three iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent on thermal resistance RθJA, and thermal resistance is highly dependent on the individual package and board layout. The "Dissipating Rating Table" at the beginning of this document provides example thermal resistance for specific packages and board layouts.