JAJSLB2D november 2014 – april 2023 DLP9500UV
PRODUCTION DATA
General decoupling capacitors for the DLP9500UV should be distributed around the PCB and placed to minimize the distance from IC voltage and ground pads. Each decoupling capacitor (0.1 µF recommended) should have vias directly to the ground and power planes. Via sharing between components (discreet or integrated) is discouraged. The power and ground pads of the DLP9500UV should be tied to the voltage and ground planes with their own vias.