The device uses a serial peripheral interface (SPI) bus to set device configurations, operating parameters, and read out diagnostic information. The device SPI operates in slave mode and connects to a master external controller. If SPI CRC (SPI_CRC_EN = 1b) is enabled, the SPI input data (SDI) word consists of a 32 bit word, with an 8 bit command, 16 bits of data, and 8 bit CRC (initial value 0xFF, polynomial 0x2F). The SPI output data (SDO) word consists of a 32 bit word, with an 8-bit status data, 16 bits of register data and 8bit CRC (initial value 0xFF, polynomial 0x2F). If SPI CRC is disabled (SPI_CRC_EN = 0b), the SPI data word consists of 24 bit word, where 8 bit CRC is excluded.

A valid frame must meet the following conditions:

• The SCLK pin should be low when the nSCS pin transitions from high to low and from low to high.
• The nSCS pin should be pulled high for at least 400 ns between words.
• When the nSCS pin is pulled high, any signals at the SCLK and SDI pins are ignored and the SDO pin is set Hi-Z.
• Data is captured on the falling edge of SCLK and data is propagated on the rising edge of SCLK.
• The most significant bit (MSB) is shifted in and out first.
• A full 32 (or 24) SCLK cycles must occur for transaction to be valid.
• If the data word sent to the SDI pin is not 32 (or 24) bits, a frame error occurs and the data word is ignored.
• For a write command, the existing data in the register being written to is shifted out on the SDO pin following the 8 bit command data.
• The SDO pin is a push-pull type output.
• The SPI fault is confirmed at the rising edge of nSCS.