JAJSSB8 November   2023 TDP2004

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 DC Electrical Characteristics
    6. 5.6 High Speed Electrical Characteristics
    7. 5.7 SMBUS/I2C Timing Characteristics
    8. 5.8 Typical Characteristics
    9. 5.9 Typical Jitter Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Linear Equalization
      2. 6.3.2 Flat-Gain
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Standby Mode
    5. 6.5 Programming
      1. 6.5.1 Pin mode
        1. 6.5.1.1 Five-Level Control Inputs
      2. 6.5.2 SMBUS/I2C Register Control Interface
        1. 6.5.2.1 Shared Registers
        2. 6.5.2.2 Channel Registers
      3. 6.5.3 SMBus/I 2 C Primary Mode Configuration (EEPROM Self Load)
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 DP 2.1 Mainlink Signal Conditioning
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

High Speed Electrical Characteristics

over operating free-air temperature and voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Receiver
RLRX-DIFF Input differential return loss 3 GHz -19 dB
4 GHz -18 dB
5 GHz -18 dB
6 GHz -17 dB
10 GHz -15 dB
XTRX Receiver-side pair-to-pair isolation; Port A or Port B Minimum over 10 MHz to 10 GHz range -60 dB
Transmitter
RLTX-DIFF Output differential return loss 3 GHz -19 dB
RLTX-DIFF Output differential return loss 4.0 GHz -18 dB
RLTX-DIFF Output differential return loss 5.0 GHz -18 dB
RLTX-DIFF Output differential return loss 6.0 GHz -17 dB
RLTX-DIFF Output differential return loss 10 GHz -16 dB
XTTX Transmit-side pair-to-pair isolation Minimum over 10 MHz to 10 GHz range -60 dB
Device Datapath
TPLHD/PHLD Input-to-output latency (propagation delay) through a data channel For either low-to-high or high-to-low transition.  100 130 ps
LTX-SKEW Lane-to-lane output skew Between any two lanes within a single transmitter.  20 ps
TRJ-DATA Additive random jitter with data Jitter through redriver minus the calibration trace. 20Gbps PRBS15. 800 mVpp-diff input swing 70 fs
XT Channel to channel xtalk (between adjacent active channels, FEXT Minimum over 10 MHz to 10 GHz range, normalized to EQ gain of 0dB  -43 dB
FLAT-GAIN Broadband DC and AC flat gain - input to output,  measured at DC Minimum EQ, GAIN = L0  -5.6 dB
Minimum EQ, GAIN = L1  -3.8 dB
Minimum EQ, GAIN = L2  -1.2 dB
Minimum EQ, GAIN = L3  2.6 dB
Minimum EQ, GAIN = L4 (Float)  0.6 dB
EQ-MAX10G EQ boost at max setting (EQ INDEX = 19)  AC gain at 10 GHz relative to gain at 100 MHz.  19 dB
LINEARITY-DC Output DC linearity at GAIN = L4  1750 mVpp
LINEARITY-AC Output AC linearity at 10Gbps, with GAIN = L4  1100 mVpp
at 20Gbps, with GAIN = L4  1080 mVpp