JAJSL68A April 2021 – February 2022 TPS23882B
PRODUCTION DATA
COMMAND = 10h with 1 Data Byte, Read only
Each bit represents the actual power status of a channel.
Each bit xx1-4 represents an individual channel.
These bits are cleared when channel-n is turned off, including if the turn off is caused by a fault condition.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PG4 | PG3 | PG2 | PG1 | PE4 | PE3 | PE2 | PE1 |
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7–4 | PG4–PG1 | R | 0 | Each bit, when at 1, indicates that the channel is on and that the voltage at DRAINn pin has gone below the power good threshold during turn on.
These bits are latched high once the turn on is complete and can only be cleared when the channel is turned off or at RESET/POR. 1 = Power is good 0 = Power is not good |
3–0 | PE4–PE1 | R | 0 | Each bit indicates the ON/OFF state of the corresponding channel.
1 = Channel is on 0 = Channel is off |