JAJSQ40A July   2023  – December 2023 TXV0108-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics, VCCA = 1.8 ± 0.15 V
    7. 5.7 Switching Characteristics, VCCA = 2.5 ± 0.2 V
    8. 5.8 Switching Characteristics, VCCA = 3.3 ± 0.3 V
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Load Circuit and Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 7.3.2 Partial Power Down (Ioff)
      3. 7.3.3 VCC Isolation and VCC Disconnect (Ioff-float)
      4. 7.3.4 Over-Voltage Tolerant Inputs
      5. 7.3.5 Negative Clamping Diodes
      6. 7.3.6 Fully Configurable Dual-Rail Design
      7. 7.3.7 Supports Timing Sensitive Translation
      8. 7.3.8 Wettable Flanks
      9. 7.3.9 Integrated Damping Resistor and Impedance Matching
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 Solving Power Sequencing Challenges with the TXV0108-Q1
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGY|24
サーマルパッド・メカニカル・データ
発注情報

7.3.3 VCC Isolation and VCC Disconnect (Ioff-float)

This device has 2 features VCC Isolation and VCC Disconnect which helps in preventing current backflow in case the device is powered down unexpectedly. VCC Isolation occurs when one of the supplies is kept at (or goes to) zero during normal operation, no current will be consumed by the supply that is maintained. This scenario forces all I/Os to be High-Z. VCC Disconnect occurs when one of the supplies is left floating (disconnects) after ramping up, the I/Os are forced into High-Z without consuming any current from the maintained supply. In both cases, the I/Os will enter a high-impedance state when either supply (VCCA or VCCB) is < 100 mV or left floating, while the other supply is still connected to the device. See Figure 7-2 for a visual representation.

The maximum supply current is specified by ICCx, while VCCx is floating, in the Electrical Characteristics. The maximum leakage into or out of any I/O pin on the device is specified by Ioff(float) in the Electrical Characteristics.

GUID-20230714-SS0I-9JSC-TTQT-L3Q04THXWJTL-low.svg Figure 7-2 VCC Disconnect and VCC Isolation Feature