SLVUCQ6 july   2023 TPS7H2211-SEP

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Alternate Board Configurations
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 EVM Connectors and Test Points
  7. 3Implementation Results
    1. 3.1 Default Configuration Results
    2. 3.2 Parallel Configuration Results
  8. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 Board Layout
    3. 4.3 Bill of Materials (BOM)
  9. 5Related Documentation

4.1 Schematic

Figure 5-1 shows the default TPS7H2211EVM schematic. Figure 5-2 is the schematic for the parallel configuration of the EVM shown in this document.

GUID-20230628-SS0I-HZH2-DSRL-LNF4CFG2TP7T-low.gifFigure 4-1 TPS7H2211EVM Default Schematic
GUID-20230706-SS0I-XPL6-M0PM-GS7CNMBTBKRL-low.svgFigure 4-2 Example: TPS7H2211EVM Parallel Schematic