SLVUCQ6 july   2023 TPS7H2211-SEP

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Alternate Board Configurations
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 EVM Connectors and Test Points
  7. 3Implementation Results
    1. 3.1 Default Configuration Results
    2. 3.2 Parallel Configuration Results
  8. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 Board Layout
    3. 4.3 Bill of Materials (BOM)
  9. 5Related Documentation

Parallel Configuration Results

The results shown in Figure 4-5 through Figure 4-8 were observed using the TPS7H2211EVM in the parallel configuration shown in this document with VIN = 13 V.

GUID-A8F1C04A-E17E-451D-95FF-64F69D01EF09-low.pngFigure 3-5 Parallel Configuration: Start Up
GUID-41418E83-1FAC-431A-8B1B-16F5863CCB45-low.pngFigure 3-6 Parallel Configuration: Shutdown
GUID-50F26730-8341-4EFF-BC7C-123D1DC13FCB-low.pngFigure 3-7 Parallel Configuration: Assertion of OVP due to Input Voltage
GUID-BD1386BB-C599-4A71-910F-0C39CD7107F4-low.pngFigure 3-8 Parallel Configuration: Deassertion of OVP due to Input Voltage