SLVUCQ6
july 2023
TPS7H2211-SEP
1
Description
Features
4
1
Evaluation Module Overview
1.1
Introduction
1.2
Kit Contents
1.3
Specification
1.3.1
Alternate Board Configurations
1.4
Device Information
2
Hardware
2.1
EVM Connectors and Test Points
3
Implementation Results
3.1
Default Configuration Results
3.2
Parallel Configuration Results
4
Hardware Design Files
4.1
Schematic
4.2
Board Layout
4.3
Bill of Materials (BOM)
5
Related Documentation
4.2
Board Layout
Figure 5-3
through
Figure 5-9
show the layout of the TPS7H2211EVM.
Figure 4-3
Top Overlay
Figure 4-4
Top Solder Mask
Figure 4-5
Layer 1 (Top)
Figure 4-6
Layer 2
Figure 4-7
Layer 3-7
Figure 4-8
Layer 8 (Bottom)
Figure 4-9
Bottom Solder