SLVUCQ6 july   2023 TPS7H2211-SEP

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Alternate Board Configurations
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 EVM Connectors and Test Points
  7. 3Implementation Results
    1. 3.1 Default Configuration Results
    2. 3.2 Parallel Configuration Results
  8. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 Board Layout
    3. 4.3 Bill of Materials (BOM)
  9. 5Related Documentation

Board Layout

Figure 5-3 through Figure 5-9 show the layout of the TPS7H2211EVM.

GUID-20230628-SS0I-QZD2-KJXN-VD8C0ZM2MBQF-low.gifFigure 4-3 Top Overlay
GUID-20230628-SS0I-FKXX-SVXS-LDWDWL96NTB4-low.gifFigure 4-4 Top Solder Mask
GUID-20230628-SS0I-9BBD-BFNF-B4TNNDG6MXCL-low.gifFigure 4-5 Layer 1 (Top)
GUID-20230628-SS0I-GTBK-ZZDW-W2BQKCQML7XS-low.gifFigure 4-6 Layer 2
GUID-20230628-SS0I-RJWN-2JHQ-H6RB15STMKLH-low.gifFigure 4-7 Layer 3-7
GUID-20230628-SS0I-NNMC-N9VK-X0FXXFQLX8M9-low.gifFigure 4-8 Layer 8 (Bottom)
GUID-20230628-SS0I-TDDL-FVGJ-7G56DF5PG3WX-low.gifFigure 4-9 Bottom Solder