SNLA443 December   2023 DP83869HM

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1DP83869 Application Overview
  5. 2Troubleshooting the Application
    1. 2.1 Configuring Correct Operational Mode
    2. 2.2 Schematic and Layout Checklist
    3. 2.3 Component Checklist
    4. 2.4 Peripheral Pin Checks
      1. 2.4.1 Power Supplies
      2. 2.4.2 RBIAS Voltage and Resistance
      3. 2.4.3 Probe the XI Clock
      4. 2.4.4 Probe the RESET_N Signal
      5. 2.4.5 Probe the Strap Pins During Initialization
      6. 2.4.6 Probe the Serial Management Interface Signals (MDC, MDIO)
      7. 2.4.7 Probe the MDI Signals
    5. 2.5 Built-In Self Test with Various Loopback Modes
    6. 2.6 Debugging MAC Interface
      1. 2.6.1 RGMII
      2. 2.6.2 SGMII
  6. 3Operational Mode Clarification
    1. 3.1 Bridge Modes
    2. 3.2 Fiber Configuration
      1. 3.2.1 Fiber Registers
  7. 4Tools and References
    1. 4.1 DP83869HM Register Access
    2. 4.2 Extended Register Access
      1. 4.2.1 Read (No Post Increment) Operation
      2. 4.2.2 Write (No Post Increment) Operation
    3. 4.3 Software and Driver Debug on Linux
      1. 4.3.1 Common Terminal Outputs
  8. 5Summary
  9. 6References

2.4.5 Probe the Strap Pins During Initialization

In some cases, other devices on the board (for example, the MAC) pull or drive these pins unexpectedly. Confirm that these signals are in the range of the target voltages described in the data sheet. Measurements can be made during power up and after power up when the RESET_N signal is asserted.

For further confirmation, the strap values can be read from the registers. The values are available in register 0x006E (STRAP_STS).

Note: Register 0x6E is an extended register and cannot be accessed directly. Please reference Section 4.2.