SNVU851A November 2023 – January 2024
LP87725Q1EVM has many terminal blocks, jumpers and test points to offer certain flexibility to help users to verify the EVM according to their application conditions. However, the EVM is pre-configured with default jumper settings and users can power-up the regulators without the need of jumper modifications. Setting these jumpers correctly for the correct function of the EVM is important. Table 3-1 lists all the terminal blocks on the EVM and Table 3-2 lists the jumpers and their functionality. All the terminal blocks are marked with polarity and Pin 1 of test points / jumpers are marked with white dot for identification purpose. To understand more about the jumper functionality, see the schematic diagrams in Section 6.1.
| Terminal Block Number | Terminal Block Name | Description |
|---|---|---|
| J1 | VIN 3.3 V | 3.3 V External Input Voltage |
| J17 | VOUT_LDO_LS1 | Terminal block for LDO, LS1 Output |
| J18 | VOUT_LS2 | Terminal block for LS2 Output |
| J24 | BUCK1 | Terminal block for BUCK1 Output |
| J25 | BUCK3 | Terminal block for BUCK3 Output |
| J26 | BUCK2 | Terminal block for BUCK2 Output |
| J30 | J30 | USB Connector |
| J33 | VBAT | 5 V - 20 V Input |
| Jumper/Connector Number | Jumper/Connector Name | Configuration | Description |
|---|---|---|---|
| J2 | WD_DIS | Option 1: Pin 2 and 3 | Pull down resistor on nERR/WD_DIS pin enables Q&A watchdog during the PMIC power-up. For this to be effective, J7 must be closed on Pin 2/3. |
| Option 2: Pin 1 and 2 | nERR/WD_DIS pin is pulled up to VIO. | ||
| Open (default) | Neither Q&A watchdog enabled during the PMIC power-up nor nERR/WD_DIS pin is pulled up to VIO | ||
| J3 | EN_PVIN_3V3 | Closed (Default) | Connects PMIC ENABLE pin to PVIN_Bx pins (PVIN_3V3) and device gets enabled as soon as 3.3 V is generated/applied |
| Open | If PMIC needs to be enabled through USB/GUI or through pre-regulator PGOOD signal, then this jumper must be kept open | ||
| J4 | PVIN_3V3 | Option 1: Pins 1/3 and 2/4 3V3_PREREG (Default) |
PVIN_3V3 connected to preregulator output. J4-Option-2 must be open and J5 must be open. |
| Option 2: Pins 5/7 and 6/8 3V3_PS |
PVIN_3V3 connected to external 3.3V supply (J1). J4-Option-1 must be open and J5 must be open. |
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| J5 | 3V3_USB | Open (Default) | Either option from J4 must be used. |
| Closed |
PMIC input supply (PVIN_3V3) is generated from USB supply. J4 jumpers must be open if this jumper is closed. |
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| J6 | EN_LVPMIC | Option 1: Open (Default) | PMIC Enable signal from 3.3 V Input. J3 must be closed |
| Option 2: Pins 1 and 2 | PMIC Enable signal path from GUI interface. J3 must be open if this option is used | ||
| Option 3: Pins 2 and 3 | PMIC Enable signal path from pre-regulator PGOOD signal. J3 must be open if this option is used | ||
| J8 | VIO_SEL | Pins 1 and 2 | 3.3 V supply generated from USB supply |
| Pins 2 and 3 (Default) | 3.3 V VIO supply generated from PVIN3V3 | ||
| J9 | PVIN_LDO_LS1 | Pins 1 and 2 | Input to the LDO_LS1 is taken from BUCK3 and 1.2 V is supplied as a result. |
| Pins 2 and 3 (Default) | Input to the LDO_LS1 is taken from PVIN3V3 (3.3 V) | ||
| J10 | SYNCCLK/VMON2 | Pin 1 and 2 | VOUT_LS2/ VMON2/ SYNCCLK pin connected to MCU clock port (used for testing external clock input signal) |
| Pin 2 and 3 | Input 1.2 V from BUCK3 and flexibility to change voltage through voltage resistor divider to VMON2 | ||
| J12 | nRSTOUT | Pins 1 and 2 (Default) | Connects PMIC nRSTOUT signal to MCU port directly |
| Pins 2 and 3 | Connects PMIC nRSTOUT signal to MCU port through level shifter | ||
| J13 | VMON1_SEL | Closed | VMON1 reference voltage generated from voltage divider from BUCK1 (1.8 V) supply |
| Open (Default) | PMIC is not connected to monitor VMON1 | ||
| J14 | nINT/GPIO | Pins 1 and 2 (Default) | Connects PMIC nINT or GPIO signal to MCU port directly. This is valid only if J15 is closed on Pin 2 and 3. |
| Pins 2 and 3 | Connects PMIC nINT or GPIO signal to MCU port through level shifter.This is valid only if J15 is closed on Pin 2 and 3 | ||
| J15 | PVIN_LS2/nINT/GPIO | Pins 1 and 2 (Default) | LS2 is input supply connected to PVIN3V3 (3.3 V) |
| Pins 2 and 3 | nINT or GPIO signals connected to J14 which connects to either MCU port directly or through level shifter depending on J14 jumper selection. | ||
| J16 | nERR | Pins 1 and 2 | Connects PMIC nERR/WD_DIS signal to MCU port directly |
| Pins 2 and 3 | Connects PMIC nERR/WD_DIS signal to MCU port through level shifter (series resistors must be mounted if this option is used) | ||
| J34 | I2C_CONN | Pins 1 and 2 (Default) | Connects PMIC SCL_I2C signal to MCU SCL_I2C port directly |
| Pins 2 and 3 | Connects PMIC SCL_I2C signal to MCU SCL_I2C port through a level shifter (series resistors need to be mounted if this option is used) | ||
| J35 | Pins 1 and 2 (Default) | Connects PMIC SDA_I2C signal to MCU SDA_I2C port directly | |
| Pins 2 and 3 | Connects PMIC SDA_I2C signal to MCU SDA_I2C port through a level shifter (series resistors need to be mounted if this option is used) |