SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Time Sync events are 96-bit or 128-bit (for 32-bit and 64-bit time stamp respectively) values that are pushed onto the event FIFO and read by software in 32-bit reads. Four 32-bit registers, CPTS_EVENT_0_REG throught CPTS_EVENT_3_REG hold the data of a time sync event.