SPRUIZ2 july   2023 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Feature Differences Between F2838x and F28P65x
    1. 1.1 F2838x and F28P65x Feature Comparison
  5. 2PCB Hardware Changes
    1. 2.1 PCB Hardware Changes for the 176-Pin PTP Package
    2. 2.2 Use of Existing 176-Pin F2838x PCB Design
      1.      9
      2. 2.2.1 JTAG TRSTn No-Connect
      3. 2.2.2 GPIO Input Buffer Control Register
      4. 2.2.3 176-Pin GPIO Pin/Multiplex and ADCD Considerations
        1. 2.2.3.1 176-Pin PTP Pins With Different GPIO Assignment
        2. 2.2.3.2 ADCD Channel Migration
    3. 2.3 176-Pin PTP New PCB Design
    4. 2.4 337-BGA ZWT Application to 256-BGA ZEJ or 169-BGA NMR
  6. 3Feature Differences for System Consideration
    1. 3.1 New Features in F28P65x
      1. 3.1.1  Lock-step Compare Module (LCM)
      2. 3.1.2  Expanded Analog Channels
      3. 3.1.3  Firmware Update (FWU)
      4. 3.1.4  Flexible GPIO and Digital Input Pins
      5. 3.1.5  New ADC Features
      6. 3.1.6  New EPWM Features
      7. 3.1.7  New CMPSS Features
      8. 3.1.8  ADC Hardware Redundancy Safety Checker
      9. 3.1.9  Flexible Memory Sharing between CPU Subsystems
      10. 3.1.10 Increased RAM Program Memory on CLA
    2. 3.2 Communication Module Changes
    3. 3.3 Control Module Changes
    4. 3.4 Analog Module Differences
    5. 3.5 Other Device Changes
      1. 3.5.1 PIE Channel Mapping
        1. 3.5.1.1 F2838x vs F28P65x PIE Channel Mapping Comparison
      2. 3.5.2 Bootrom
      3. 3.5.3 CLB and Motor Control Libraries
      4. 3.5.4 ERAD
      5. 3.5.5 AGPIO Filter
    6. 3.6 Power Management
      1. 3.6.1 VREGENZ
      2. 3.6.2 LDO/VREG
      3. 3.6.3 POR/BOR
      4. 3.6.4 Power Consumption
    7. 3.7 Memory Module Changes
    8. 3.8 GPIO Multiplexing Changes
      1. 3.8.1 F2838x vs F28P65x GPIO Mux Comparison
    9. 3.9 Analog Multiplexing Changes
      1. 3.9.1 F2838x_176PTP vs F28P65x_176PTP Analog Connections Comparison
  7. 4Application Code Migration From F2838x to F28P65x
    1. 4.1 C2000Ware Header Files
    2. 4.2 Linker Command Files
    3. 4.3 C2000Ware Examples
  8. 5References

F2838x_176PTP vs F28P65x_176PTP Analog Connections Comparison

Table 3-16 Analog Mux Legend
Color Description
common for both devices
applicable only for F2838x
applicable only for F28P65x
different between devices, F2838x listed on first row and F28P65x in second row
Table 3-17 Analog Mux Overlay Table
Pin Name ADCA ADCB ADCC ADCD DAC High Positive High Negative Low Positive Low Negative AIO
22 C0 C0 CMP6_HP1 CMP6_HN1 CMP6_LP1 CMP6_LN1
23 C1 C1 CMP6_HP2 CMP6_LP2
24 C9 C9 CMP11_HP2 CMP11_LP2
25 C8 C8 CMP10_HP2 CMP10_LP2
26 C7 C7 CMP11_HP1 CMP11_LP1
27 C6 C6 CMP10_HP1 CMP10_LP1
28 C5 C5 CMP5_HN0 CMP2_LP3 CMP5_LN0
29 C4/CMPIN5P
-->
C4
C4 CMP5_HP0 CMP10_HN1 CMP5_LP0 CMP10_LN1
30 C3/CMPIN6N
-->
C3
C3 CMP6_HN0 CMP3_LP3 CMP6_LN0
31 C2/CMPIN6P
-->
C2
C2 CMP6_HP0 CMP6_LP0 AIO237
32 VREFLOC
33 VREFLOA
35 VREFHIC
37 VREFHIA
38 A5/CMPIN2N
-->
A5
A5 CMP2_HP3 CMP2_HN0 CMP9_LP2 CMP2_LN0 AIO232
39 A4/CMPIN2P
-->
A4
A4 CMP2_HP0 CMP2_LP0 AIO231
40 A3/CMPIN1N
-->
A3
A3 CMP1_HP3 CMP1_HN0 CMP1_LN0 AIO230
41 A2/CMPIN1P
-->
A2
A2 CMP1_HP0 CMP2_HN1 CMP1_LP0 CMP2_LN1 AIO229
42 A1/DACB_OUT
-->
A1
A1 DACB_OUT CMP1_HP2 CMP1_HN1 CMP1_LP2 CMP1_LN1 AIO228
43 A0/DACA_OUT A0 DACA_OUT CMP1_HP1 CMP9_HN0 CMP1_LP1 CMP9_LN0 AIO227
44 A14/B14/C14/D14/CMPIN4P
-->
A14/B14/C14
A14 B14 C14 D14 CMP4_HP0 CMP4_LP0 AIO225
45 A15/B15/C15/D15/CMPIN4N
-->
A15/B15/C15
A15 B15 C15 D15 CMP4_HP3 CMP4_HN0 CMP4_LN0 AIO226
46 B0/VDAC B0 VDAC CMP3_HP1 CMP11_HN0 CMP3_LP1 CMP11_LN0 AIO233
47 B1/DACC_OUT B1 DACC_OUT CMP3_HP2 CMP3_LP2 AIO234
48 B2/CMPIN3P
-->
B2
B2 CMP3_HP0 CMP3_LP0 AIO235
49 B3/CMPIN3N
-->
B3
B3 CMP3_HN0 CMP1_LP3 CMP3_LN0 AIO236
50 VREFLOB
51 VREFLOD
-->
B11
B11 CMP4_HP2 CMP4_LP2 AIO240
53 VREFHIB
55 VREFHID
-->
B6
B6 CMP7_HP1 CMP7_HN1 CMP7_LP1 CMP7_LN1
56 D0/CMPIN7P
-->
B7
B7 D0 CMP7_HP0
-->
CMP7_HP2
CMP3_HN1 CMP7_LP0
-->
CMP7_LP2
CMP3_LN1
57 D1/CMPIN7N
-->
A6
A6 D1 CMP7_HP0 CMP7_HN0 CMP7_LP0 CMP7_LN0
58 D2/CMPIN8P
-->
A7
A7 D2 CMP8_HP0
-->
CMP9_HP2
CMP7_HN0 CMP8_LP0
-->
CMP4_LP3
CMP7_LN0
59 D3/CMPIN8N
-->
A8
A8 D3 CMP8_HP0 CMP8_HN0 CMP8_LP0 CMP8_LN0
60 D4
-->
A9
A9 D4 CMP8_HN0 CMP5_LP3 CMP8_LN0
61 B10 B10 CMP4_HP1 CMP4_HN1 CMP4_LP1 CMP4_LN1
62 A10 A10 CMP8_HP1 CMP8_HN1 CMP8_LP1 CMP8_LN1
63 A11 A11 CMP8_HP2 CMP8_LP2
64 B4 B4 CMP5_HP1 CMP5_HN1 CMP5_LP1 CMP5_LN1
65 B5 B5 CMP5_HP2 CMP5_LP2
66 B8 B8 CMP2_HP1 CMP10_HN0 CMP2_LP1 CMP10_LN0
67 B9 B9 CMP2_HP2 CMP9_HN1 CMP2_LP2 CMP9_LN1
INT1 TEMP SENSOR A13 B18