There are several registers within the CTRL_MMR
moduels related to power and reset control (CTRL) and status (STAT).
Reset-realted registers:
- RESET_SRC_STAT: Indicates
which reset occured
- MAIN_POR_TO_CTRL: Sets the
MAIN PORz hardware timeout period
- POR_RST_CTRL: Controls POR behavior
- WARM_RST_CTRL: Controls Warm Reset behavior
- RST_STAT: Indicates the reset status
Power-realted registers:
- PRGx_CTRL/STAT: PRG module control and status of the POK and POR
over/undervoltage detectors
- POR_POK*_CTRL/STAT: Control and status of the POR module over/undervoltage
detectors
- POK_*_CTRL/STAT: Control and status of the POK module over/undervoltage
detectors
- GLDTC_CTRL/STAT: Control and status of the PGD module voltage glitch
detectors