SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
The Arm® Cortex®-M33 processor debug functionality includes processor halt, single-step, processor core register access, Vector Catch, unlimited software breakpoints, and full system memory access. The processor also includes support for hardware breakpoints and watchpoints:
A breakpoint unit supporting eight instruction comparators
A watchpoint unit supporting four data watchpoint comparators
The Cortex®-M33 processor supports system level debug permissions to control access from a debugger to resources and memory. The authentication can be used to allow a debugger full access to Non-secure code and data without exposing any Secure information. All debug registers are accessible by the D-AHB interface. D-AHB interface accesses are only in little-endian format.
The debug is done through JTAG and cJTAG. Figure 2-2 shows a diagram of the JTAG connection with the processor.
See the Armv8-M Architecture Reference Manual for more information.