SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
Standby mode is defined as all power domains in the MCU_VD being powered off and the micro LDO supplying AON_VD and MCU_AON (see Figure 7-2). Standby is the lowest power mode where the CC13x4x10 and
CC26x4x10 device platform still has functionality other than maintaining I/O output pins and detecting input state changes (see
Table 7-6). The Always On Watchdog Timer (AON_WDT) can be used in this mode.
All parts in MCU_AON are retained in standby mode. All modules in MCU_VD with retention, as shown in Figure 7-3, are retained in standby mode. All other logic in MCU_VD must be reconfigured after wake up from standby mode.
Possible wake-up sources are events from I/O, JTAG, RTC, BATMON, and the sensor controller.
The following are prerequisites for the CC13x4x10 and CC26x4x10 device platform to enter standby mode:
Description | Register | Required Step |
---|---|---|
Configure recharge configuration | AON_PMCTL:RECHARGECFG | Yes |
Freeze the IOs on the boundary between MCU and AON | AON_IOC:IOCLATCH.EN | Yes |
Make sure that any possible outstanding AON writes are complete before turning off the power domains | AON_RTC:SYNC.WBUSY |
Yes (Read register) |
Turn off power domains and verify they are turned off |
PRCM:PDCTL0RFC PRCM:PDCTL0SERIAL PRCM:PDCTL0PERIPH PRCM:PDCTL1CPU |
Yes |
Make sure that no clocks are forced on in any modes for CRYPTO, μDMA and I2S |
PRCM:SECDMACLKGR PRCM: I2SCLKGR |
Yes |
Gate running deep sleep clocks for CRYPTO, μDMA and I2S |
PRCM:SECDMACLKGDS.CRYPTO_CLK_EN PRCM:SECDMACLKGDS.DMA_CLK_EN PRCM:I2SCLKGDS |
Yes |
Load the new clock settings | PRCM:CLKLOADCTL | Yes |
Configure the VIMS power domain mode | PRCM:PDCTL1VIMS | Yes |
Request digital supply to be micro LDO |
PRCM:VDCTL | Yes |
Make sure that all writes have taken effect | AON_RTC:SYNC.WBUSY | Yes |
Make sure that UDMA, CRYPTO and I2C clocks are turned off |
PRCM:CLKLOADCTL.LOAD_DONE |
Yes |
Make sure that power domains have been turned off |
PRCM:PDSTAT0 PRCM:PDSTAT0RFC PRCM:PDSTAT0SERIAL PRCM:PDSTAT0PERIPH |
Yes |
Turn off cache retention if requested | PRCM:RAMRETEN |
No (default: retention enabled) |
Set the system CPU SLEEPDEEP bit | CPU_SCS:SCR.SLEEPDEEP | Yes |
Stop the system CPU to start the power-down sequence | WFI or WFE | Yes |